List of Archived Posts

2007 Newsgroup Postings (01/28 - 02/23)

Securing financial transactions a high priority for 2007

Has anyone ever used self-modifying microcode? Would it even be useful?

uNIX circa 1982?

Has anyone ever used self-modifying microcode? Would it even be useful?

Jim Gray Is Missing

Securing financial transactions a high priority for 2007

Jim Gray Is Missing

Has anyone ever used self-modifying microcode? Would it even be useful?

Jim Gray Is Missing

Has anyone ever used self-modifying microcode? Would it even be useful?

The logic of privacy

Securing financial transactions a high priority for 2007

One Time Identification, a request for comments/testing

Why so little parallelism?

Unix magic poster

Pennsylvania Railroad ticket fax service

"The Elements of Programming Style"

Jim Gray Is Missing

IBMLink 2000 Finding ESO levels

Pennsylvania Railroad ticket fax service

Intel prepares to kill off the Pentium 4

How many 36-bit Unix ports in the old days?

How many 36-bit Unix ports in the old days?

How many 36-bit Unix ports in the old days?

How many 36-bit Unix ports in the old days?

modern paging

Securing financial transactions a high priority for 2007

modern paging

SVCs

old tapes

distribution methods

old tapes

Running OS/390 on z9 BC

Jim Gray Is Missing

Mixed Case Password on z/OS 1.7 and ACF 2 Version 8

MAC and SSL

MAC and SSL

MAC and SSL

Question on Network Security

old tapes

old tapes

Is computer history taugh now?

Mixed Case Password on z/OS 1.7 and ACF 2 Version 8

Is computer history taugh now?

Is computer history taugh now?

Is computer history taugh now?

Has anyone ever used self-modifying microcode? Would it even be useful?

Is computer history taugh now?

IBM S/360 series operating systems history

certificate distribution

Is computer history taugh now?

IBM S/360 series operating systems history

CMS (PC Operating Systems)

Is computer history taugh now?

Is computer history taugh now?

Is computer history taugh now?

Is computer history taugh now?

Which is the Fastest (Secure) Way to Exchange 256-bit Keys?

Is computer history taugh now?

Is computer history taugh now?

SLL Certificate

ISA Support for Multithreading

Cycles per ASM instruction

Cycles per ASM instruction

Is computer history taugh now?

IBM S/360 series operating systems history

Is computer history taugh now?

SLL Certificate

Securing financial transactions a high priority for 2007

IBM S/360 series operating systems history

Securing financial transactions a high priority for 2007

Cycles per ASM instruction

IBM S/360 series operating systems history

Securing financial transactions a high priority for 2007

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Securing financial transactions a high priority for 2007
Newsgroups: alt.folklore.computers
Date: Sun, 28 Jan 2007 16:48:37 -0700

re:
http://www.garlic.com/~lynn/2007c.html#52 Securing financial transactions a high priority for 2007

and old reference to what was lengthy and on-going discussion about
managing encryption for large scale HSDT infrastructure ... misc. past
posts mentioning HSDT
http://www.garlic.com/~lynn/subnetwork.html#hsdt


To: wheeler
Date: 12/18/84  08:39:12

...

I know there is a lot of dissenting opinion, but I happen to believe
that some kind of public key mechanism will end up being used for key
management in the business world.  I understand some of the problems
with the basic security of the current schemes, but the other side of
the coin is trying to coordinate session keys between sources and
sinks in the networks that are already in place, let alone what is
coming down the pike.  Specifically, some of the multiple network or
satellite point-to-multipoint session keys could be nicely handled
with some kind of public key mechanism.  The current MVS Cryptographic
Subsystem key management scheme is a perfect example of the morass
that faces us in 'automatically' managing keys.

... snip ... top of post, old email index

old email with some reference to public key
http://www.garlic.com/~lynn/2006w.html#email810515
http://www.garlic.com/~lynn/2006.html#email850701
http://www.garlic.com/~lynn/2007c.html#email860120

Has anyone ever used self-modifying microcode? Would it even be useful?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful?
Newsgroups: alt.folklore.computers
Date: Mon, 29 Jan 2007 09:42:15 -0700

Chris Barts <puonegf+hfrarg@tznvy.pbz> writes:

A somewhat cursory Google doesn't bring up anything useful on the subject
of self-modifying microcode. (In fact, the exact phrase search
"self-modifying microcode" (with quotes) brings up zero results.) There's
been a lot of self-modifying machine code in the world -- in fact, the
PDP-8 subroutine calling convention depended on a relatively minor form of
this dark art -- but I can't dredge up any reference to it being used one
level lower.

Further, would it be useful? It seems like a way to squeeze the most out
of code that must always be as fast as possible and must usually fit in
very cramped store. Maybe the store it usually resides in has large speed
penalties for writing, like Flash NVRAM does now. Maybe it's so difficult
to get right the first time the idea of debugging self-modifying microcode
is a quick way to get a laugh or a slow way to end up in the nuthouse.

how 'bout pageable microcode?

floppy disk was originally developed for loading microcode into the
3830 disk controller ... and was also used for loading microcode into
many of the 370 mainframe machines. this typically happened
automatically at power-up ... however there has been recent subthread
here on the "IPL" button on 360/370 front consoles ... "initial
program load" ... which was software (boot) function. However 370s
also had "IMPL" button ... initial microcode program load ... if there
was some service update which included replacing the microprogram
floppy disk ... then the microcode could be reloaded (w/o a power
cycle).

3081 had service processor and a 3310/piccolo, FBA (fixed block
architecture) "hard disk" containing microcode for the 3081 processor
... and some processor functions could involve "paging" microcode from
the 3310.

this is different than an instruction, dynamically modifying some
(frequently immediately) following instruction, in the instruction
stream. a lot of 360 (software) code made use of this feature to
achieve real-storage compactness (compared to paging which also is
oriented towards real-storage compactness). However, it was something
of a performance penalty as processors started attempting to squeeze
instruction latency ... doing instruction decode and setup overlapped
with execution ... there had to be constant checking if some previous
instruction had modified a following instruction that had already been
fetched and decoded.

a couple past posts mentioning pageable microcode:
http://www.garlic.com/~lynn/2000d.html#82 "all-out" vs less aggressive designs (was: Re: 36 to 32 bit transition)
http://www.garlic.com/~lynn/2004j.html#45 A quote from Crypto-Gram

uNIX circa 1982?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: uNIX circa 1982?
Newsgroups: alt.folklore.computers
Date: Mon, 29 Jan 2007 13:58:21 -0700

Lawrence Statton XE2/N1GAK <yankeeinexile@gmail.com> writes:

Didn't have the "HUMOR" section either, I see.

not 1982 ... but ...


To: wheeler
Date: 80/03/06  03:49:58

>From a UNIX User's Group Newsletter:

"TUCC (Triangle Universities Computing Center, in North Carolina) has
been running TSO for 6 years and would now like to move to a
time-sharing system."

TSO may be slow, but it sure is hard to use.

... snip ... top of post, old email index

and a little more recent, Creators Admit Unix, C Hoax
http://www.garlic.com/~lynn/2006v.html#52 Is this true?

Has anyone ever used self-modifying microcode? Would it even be useful?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful?
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 07:41:06 -0700

Peter Flass <Peter_Flass@Yahoo.com> writes:

Sounds a lot like what IBM calls "millicode" on z/Series.

and before that, Amdahl's "macrocode" from early 80s ...  it was used
for implementing hypervisor ... i.e. subset of virtual machines
... built into the machine w/o needing vm370 software kernel.

sort of 370 subset ... and one of the differences ... "macrocode"
mode eliminated provisions for supporting self-modifying code ...
and the associated performance penalty ...
http://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?

misc. past posts mentioning Amdahl's macrocode:
http://www.garlic.com/~lynn/2002p.html#44 Linux paging
http://www.garlic.com/~lynn/2002p.html#48 Linux paging
http://www.garlic.com/~lynn/2003.html#9 Mainframe System Programmer/Administrator market demand?
http://www.garlic.com/~lynn/2003.html#56 Wild hardware idea
http://www.garlic.com/~lynn/2005d.html#59 Misuse of word "microcode"
http://www.garlic.com/~lynn/2005d.html#60 Misuse of word "microcode"
http://www.garlic.com/~lynn/2005h.html#24 Description of a new old-fashioned programming language
http://www.garlic.com/~lynn/2005p.html#14 Multicores
http://www.garlic.com/~lynn/2005p.html#29 Documentation for the New Instructions for the z9 Processor
http://www.garlic.com/~lynn/2005u.html#40 POWER6 on zSeries?
http://www.garlic.com/~lynn/2005u.html#43 POWER6 on zSeries?
http://www.garlic.com/~lynn/2005u.html#48 POWER6 on zSeries?
http://www.garlic.com/~lynn/2006b.html#38 blast from the past ... macrocode
http://www.garlic.com/~lynn/2006c.html#9 Mainframe Jobs Going Away
http://www.garlic.com/~lynn/2006j.html#32 Code density and performance?
http://www.garlic.com/~lynn/2006j.html#35 Code density and performance?
http://www.garlic.com/~lynn/2006m.html#39 Using different storage key's
http://www.garlic.com/~lynn/2006p.html#42 old hypervisor email
http://www.garlic.com/~lynn/2006u.html#33 Assembler question
http://www.garlic.com/~lynn/2006u.html#34 Assembler question
http://www.garlic.com/~lynn/2006v.html#20 Ranking of non-IBM mainframe builders?
http://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?

Jim Gray Is Missing

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject:  Jim Gray Is Missing
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 08:07:42 -0700

Jim Gray Is Missing
http://developers.slashdot.org/developers/07/01/30/0353228.shtml

... and ...

Coast Guard searches for missing SF boater, 63-year-old man failed to
return from trip to Farallon Islands
http://www.sfgate.com/cgi-bin/article.cgi?f=/c/a/2007/01/29/BAGB5NR0GL6.DTL&feed=rss.bayarea

from above:

The U.S. Coast Guard is looking for a San Francisco computer scientist
who may be lost at sea after he failed to return from an outing to the
Farallon Islands Sunday afternoon.

... snip ...

a couple recent posts with old references mentioning Jim
http://www.garlic.com/~lynn/2006w.html#46 The Future of CPUs: What's After Multi-Core?
http://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"

Securing financial transactions a high priority for 2007

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Securing financial transactions a high priority for 2007
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 10:46:37 -0700

jmfbahciv writes:

The latest news is that those customers weren't affected.
Now that everybody is concentrated on maximizing face-saving,
nobody is talking about the practical stuff.

ref:
http://www.garlic.com/~lynn/2007c.html#53 Securing financial transactions a high priority for 2007

related post here
http://www.garlic.com/~lynn/aadsm26.htm#24 News.com: IBM donates new privacy tool to open-source Higgins

latest series of news items:

TJX Stored Customer Data, Violated Visa Payment Rules
http://www.informationweek.com/showArticle.jhtml?articleID=197001447
Under Fire, TJX Defends Its Handling of Card Data Breach
http://www.digitaltransactions.net/newsstory.cfm?newsid=1233
In video message, TJX says it delayed reporting for security reasons
http://www.boston.com/business/ticker/2007/01/in_video_messag.html
TJX cyberfraud spreads: Bank of America reissuing cards
http://business.bostonherald.com/businessNews/view.bg?articleid=179220&srvc
Fraud linked to TJX data heist spreads
http://www.linuxsecurity.com/content/view/126786/169/
Fraud linked to TJX data heist spreads
http://www.theregister.com/2007/01/29/tjx_data_fraud/
TJX Sued for Loss of Consumer Data
http://www.consumeraffairs.com/news04/2007/01/tjx_folo.html
Consumers of T.J. Maxx, Marshalls, HomeGoods, and A.J. Wright Bring
Class Action Suit for Loss of Credit Card Data; Filed by Berger &
Montague, PC and Stern Shapiro Weissberg & Garin, LLP
http://www.earthtimes.org/articles/show/news_press_release,51744.shtml
Consumers of T.J. Maxx, Marshalls, HomeGoods, and A.J. Wright Bring
Class Action Suit for Loss of Credit Card Data; Filed by Berger &
Montague, PC and Stern Shapiro Weissberg & Garin, LLP
http://www.prnewswire.com/cgi-bin/stories.pl?ACCT=104&STORY=/www/story/01-29-2007/0004515512&EDATE=
TJX explains reaction to data breach
http://www.abcmoney.co.uk/news/30200714213.htm
TK Maxx owner criticised after security breach
http://news.zdnet.co.uk/security/0,1000000189,39285692,00.htm
TJX faces lawsuit over data breach
http://searchsecurity.techtarget.com/originalContent/0,289142,sid14_gci1241259,00.html
Stolen TK Maxx credit card details used to commit fraud
http://www.itpro.co.uk/security/news/103333/stolen-tk-maxx-credit-card-details-used-to-commit-fraud.html

Jim Gray Is Missing

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Jim Gray Is Missing
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 13:11:12 -0700

"Jim Mehl" <mehl@ihot.com> writes:

I heard that on the news. I wondered if it was the Jim Gray I worked with
on System R. Sorry to hear that it is. That's tragic and he will be missed.
I last saw him at the System R reunion about 10 years ago, although
I did get an email from him a couple of years ago when my wife died.

The news reports mention 10 years sailing experience. It's a hell of a lot
longer than that, because I went sailing with him in the 70's.

re:
http://www.garlic.com/~lynn/2007d.html#4 Jim Gray is Missing

for a time, he had lived on sail boat moored in san fran ... and
commute down to sjr (south san jose) ... and its "at least" 10 years
experience. fortunately commute was opposite of main traffic flow
... however one of the excuses about leaving for tandem ... was that
it cut the commute.

Recently, I've seen him maybe once or twice a year for one reason or
another.

Old reference to both being keynote speakers
http://www.hdcc.cs.cmu.edu/may01/index.html

at NASA High Dependability Computing Consortium conference.

lots of past posts mentioning System/R
http://www.garlic.com/~lynn/submain.html#systemr

Has anyone ever used self-modifying microcode? Would it even be useful?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful?
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 14:39:47 -0700

Morten Reistad <first@last.name> writes:

There were also several sets of alternate microcode for the 68k
series. IBM had one, that had taken on a bluer life and imagined it
was a 360 (or was that 370).

started out as xt/370 ... i.e. basically add-on to pc/xt ... code name
washington. later it had add-on to pc/at ... as at/370. had severe
memory constraints (by vm370 and cms standards) ... and was quite disk
intensive ... which with everything being done thru co-processor to
8088 in the xt and then mapped to the xt harddisk ... could be quite
painful (single block transfer at a time with 100ms access per).

recent post about rewriting cms applications for pc environment
(as more attractive alternative considering the memory and disk
constraints of the period). recent posts
http://www.garlic.com/~lynn/2006y.html#29 The Elements of Programming Style
http://www.garlic.com/~lynn/2007.html#1 The Elements of Programming Style

note above reference has a little x-over with more recent thread:
http://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
http://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing

i did some simple benchmarks on early prototype and also noticed that
a lot of stuff page-trashed ... in the 384k bytes available for 370
operation. the result was that I then took the blame for several month
slip in customer ship while they put together an upgrade to 512k
bytes.

washington was the only product where I was able to ship my CMS paged
mapped filesystem support. At the high-end ... I could benchmark three
times thruput increase with 3380s for filesystem intensive workloads.
The degradation with the 100ms XT harddisks were quite striking ...
and CMS paged mapped filesystem support offered a little improvement.
misc. past posts about CMS page mapped filesystem support
http://www.garlic.com/~lynn/submain.html#mmap

lots of past posts mentioning Washington
http://www.garlic.com/~lynn/96.html#23 Old IBM's
http://www.garlic.com/~lynn/2000.html#5 IBM XT/370 and AT/370 (was Re: Computer of the century)
http://www.garlic.com/~lynn/2000.html#29 Operating systems, guest and actual
http://www.garlic.com/~lynn/2000.html#75 Mainframe operating systems
http://www.garlic.com/~lynn/2000e.html#52 Why not an IBM zSeries workstation?
http://www.garlic.com/~lynn/2000e.html#55 Why not an IBM zSeries workstation?
http://www.garlic.com/~lynn/2001c.html#89 database (or b-tree) page sizes
http://www.garlic.com/~lynn/2001f.html#28 IBM's "VM for the PC" c.1984??
http://www.garlic.com/~lynn/2001i.html#19 Very CISC Instuctions (Was: why the machine word size ...)
http://www.garlic.com/~lynn/2001i.html#20 Very CISC Instuctions (Was: why the machine word size ...)
http://www.garlic.com/~lynn/2001k.html#24 HP Compaq merger, here we go again.
http://www.garlic.com/~lynn/2002b.html#43 IBM 5100 [Was: First DESKTOP Unix Box?]
http://www.garlic.com/~lynn/2002b.html#45 IBM 5100 [Was: First DESKTOP Unix Box?]
http://www.garlic.com/~lynn/2002d.html#4 IBM Mainframe at home
http://www.garlic.com/~lynn/2002f.html#44 Blade architectures
http://www.garlic.com/~lynn/2002f.html#49 Blade architectures
http://www.garlic.com/~lynn/2002f.html#50 Blade architectures
http://www.garlic.com/~lynn/2002f.html#52 Mainframes and "mini-computers"
http://www.garlic.com/~lynn/2002i.html#76 HONE was .. Hercules and System/390 - do we need it?
http://www.garlic.com/~lynn/2003f.html#8 Alpha performance, why?
http://www.garlic.com/~lynn/2003f.html#56 ECPS:VM DISPx instructions
http://www.garlic.com/~lynn/2003h.html#40 IBM system 370
http://www.garlic.com/~lynn/2004h.html#29 BLKSIZE question
http://www.garlic.com/~lynn/2004m.html#7 Whatever happened to IBM's VM PC software?
http://www.garlic.com/~lynn/2004m.html#10 Whatever happened to IBM's VM PC software?
http://www.garlic.com/~lynn/2004m.html#11 Whatever happened to IBM's VM PC software?
http://www.garlic.com/~lynn/2004m.html#13 Whatever happened to IBM's VM PC software?
http://www.garlic.com/~lynn/2004o.html#9 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005f.html#6 Where should the type information be: in tags and descriptors
http://www.garlic.com/~lynn/2005f.html#10 Where should the type information be: in tags and descriptors
http://www.garlic.com/~lynn/2006f.html#2 using 3390 mod-9s
http://www.garlic.com/~lynn/2006j.html#36 The Pankian Metaphor
http://www.garlic.com/~lynn/2006m.html#56 DCSS
http://www.garlic.com/~lynn/2006n.html#5 Not Your Dad's Mainframe: Little Iron
http://www.garlic.com/~lynn/2006n.html#14 RCA Spectra 70/25: Another Mystery Computer?
http://www.garlic.com/~lynn/2006y.html#29 "The Elements of Programming Style"
http://www.garlic.com/~lynn/2006y.html#30 "The Elements of Programming Style"
http://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
http://www.garlic.com/~lynn/2007c.html#14 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007c.html#23 How many 36-bit Unix ports in the old days?

Jim Gray Is Missing

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Jim Gray Is Missing
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 14:58:41 -0700

latest news item

Scientist is missing after day trip on his yacht, S.F. MAN'S WORK
PAVED WAY FOR E-COMMERCE
http://www.mercurynews.com/mld/mercurynews/business/16578350.htm

from above ...

Jim Gray, 63, founder and manager of Microsoft's Bay Area Research
Center, had left early Sunday in his 40-foot C&C yacht, Tenacious,
from a marina near San Francisco's Fort Mason.

... snip ...

Has anyone ever used self-modifying microcode? Would it even be useful?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Has anyone ever used self-modifying microcode? Would it even be useful?
Newsgroups: alt.folklore.computers
Date: Tue, 30 Jan 2007 18:23:54 -0700

cstacy@news.dtpq.com (Christopher C. Stacy) writes:

Some of the tangentially related design features on the Lisp Machine
were: trap (to-macrocode) handlers; hardware for supporting garbage
collection; and all-tagged (type/object aware) memory/CPU hardware.

re:
http://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?
http://www.garlic.com/~lynn/2007d.html#7 Has anyone ever used self-modifying microcode? Would it even be useful?

a few past posts with old email from '79 mentioning attempts to get an
early 801 processor for lisp machines:
http://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
http://www.garlic.com/~lynn/2006c.html#3 Architectural support for programming languages
http://www.garlic.com/~lynn/2006o.html#45 "25th Anniversary of the Personal Computer"
http://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64?

in 1980 time-frame there were attempts to replace the large number of
different corporate microprocessors with 801s.

however, 801 as a "microcode" processor engine made "self-modifying"
microcode nearly impossible (in the sense of 360/370 instructions
modifying subsequent instructions in the instruction stream).

with separate I&D caches and no provisions for cache consistency
... the instruction and data "data spaces" were somewhat
disjoint. Program loaders needed special operation which would
flush/force any modifications from the data cache back to memory
... and then invalidate any corresponding locations that might happen
to be in the i-cache ... so that instruction fetch would result in an
i-cache miss, forcing a (i-cache) fetch (of the possibly modified
data) from memory (and that doesn't even take into account possible
superscaler instruction pre-fetch, decode, and execution).

posted old email mentioning 801, fort knox, romp, rios, pc/rt,
rs/6000, power/pc, etc.
http://www.garlic.com/~lynn/lhwemail.html#801

misc. collected posts mentioning 801, fort knox, romp, rios, pc/rt,
rs/6000, power/pc, etc
http://www.garlic.com/~lynn/subtopic.html#801

The logic of privacy

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The logic of privacy
Newsgroups: alt.privacy
Date: Wed, 31 Jan 2007 07:59:40 -0700

Anne & Lynn Wheeler <lynn@garlic.com> writes:

The logic of privacy, A new way to think about computing and personal
information
http://www.economist.com/science/displayStory.cfm?story_id=8486072

re:
http://www.garlic.com/~lynn/2007.html#42 The logic of privacy

somewhat related

IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html

from above:

For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid

... snip ...

note in the late 90s, FSTC
http://www.fstc.org/

had proposed something similar with "FAST" (financial authenticated
secure transaction) ... but w/o the user needing an encrypted
credential ahead of time. The institution just needed a question that
was digitally signed by the user that could be answered yes/no.

related post
http://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates new privacy tool to open-source Higgins

In the mid-90s, the x9a10 financial standards group had been given the
requirement to preserve the integrity of the financial infrastructure
for all retail transactions ... which resulted in the x9.59 standard
http://www.garlic.com/~lynn/x959.html#x959
http://www.garlic.com/~lynn/subpubkey.html#x959

which basically has a financial transaction that can be answered
yes/no ... and can be authenticated with digital signature that can be
verified with a public key on-file with the financial institution.

x9.59 financial standard also included business rule that account
numbers used in x9.59 transactions couldn't be used in
non-authenticated transactions. This didn't do anything to eliminate
(recent spate of) skimming/harvesting attacks capturing account
numbers (frequently from logs of previous transactions)
http://www.garlic.com/~lynn/subintegrity.html#harvest

however, it made the information collected unusable by the attackers
for (replay attack) fraudulent transactions.

In effect, FAST transactions were x9.59 transactions ... but allowed
transactions that asked questions concerning matters other than
approving a financial transaction (does person meet some age criteria,
address criteria, or other subject).

Part of this was from experience of the x.509 identity certificates
from the early 90s that were being overloaded with personal
information. At the time, these were being proposed as electronic
versions for things like passports and driver's licenses. Relatively
recent post on the passport subject:
http://www.garlic.com/~lynn/aadsm25.htm#46 Flaw exploited in RFID-enabled passports
http://www.garlic.com/~lynn/aadsm26.htm#0 Flaw in RFID-enabled passports (part 2?)

By the mid-90s, it was starting to dawn that such an infrastructure
represented significant privacy issues. The response in the mid-90s
was something called relying-party-only certificates
http://www.garlic.com/~lynn/subpubkey.html#rpo

which contained simple a record locater (or account number) to where
the information could be found at an institution. An institution could
used the on-file information to determine the response ... w/o
constantly spraying a whole load of privacy information around the
whole world with digital certificates.

However, it was relatively trivial to show that such digital
certificates were redundant and superfluous ... all you really needed
was a strongly authenticated transaction containing the record locator
(and infrastructure design that eliminated static data paradigm and
associated replay attacks).

This most recent news article is taking effectively the same digital
certificate/credential mechanism and encrypting the
certificate/credential ... so it is effectively (again) a
relying-party-only credential (the information only accessible
by the responsible institution). The X9.59/FAST scenario just
eliminates having to repeatedly ship (potentially egregious) payload
of the encrypted information back to the institution that issued the
credential in the first place ... past posts about egregious, bloated
payloads
http://www.garlic.com/~lynn/subpubkey.html#bloat

Securing financial transactions a high priority for 2007

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Securing financial transactions a high priority for 2007
Newsgroups: alt.folklore.computers
Date: Wed, 31 Jan 2007 08:10:56 -0700

jmfbahciv writes:

Sigh!  And only the bit gods will know for sure.  My mother
wouldn't have any idea what an encruptions are, let alone
what to about it.

re:
http://www.garlic.com/~lynn/2007c.html#51 Securing financial transactions a high priority for 2007
http://www.garlic.com/~lynn/2007c.html#52 Securing financial transactions a high priority for 2007

from slightly different standpoint

IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html

from above:

For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid

... snip ...

and recent comments (from x9.59 perspective)
http://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates new privacy tool to open-source Higgins
http://www.garlic.com/~lynn/2007d.html#10 The logic of privacy

and x9.59 references
http://www.garlic.com/~lynn/x959.html#x959
http://www.garlic.com/~lynn/subpubkey.html#x959

One Time Identification, a request for comments/testing

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: One Time Identification, a request for comments/testing.
Newsgroups: comp.protocols.kerberos
Date: Wed, 31 Jan 2007 09:11:57 -0700

g.w writes:

Its becoming increasingly obvious that the utility of passwords are
becoming problematic.  If users are forced into passwords with
sufficient entropy they write them down.  Products such as PRTK are
making it increasingly difficult to select passwords which can be
easily remembered and yet are secure.

Common solutions to this problem include One Time Password systems and
pre-authentication strategies such as PKINIT.  While effective these
systems each have their own issues ranging from diminished entropy to
complexity.

For the last several months we have been working on an alternative
strategy for a system which combines two-factor authentication with
strong single use passwords.  The primary focus of this work was to
develop a system which integrated naturally with desktop based
Kerberos authentication and was freely implementable.

The purpose of this note is to introduce the work and get
comments/feedback from the community.

The proposal is referred to as OTI or One Time Identification.  The
system is based on an identity token which can be carried on a
standard USB flash disk.  The identity token is included in an
identification payload which is symmetrically encrypted and included
in the AS_REQ authorization field.  The KDC decrypts and verifies the
identity upon receipt of the AS_REQ.  If the OTI identity matches that
of the principal requesting the service the AS_REP proceeds.

so at least

IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html

from above:

For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid

... snip

which talks about

The encrypted credentials would be for one-time use only. The next
purchase or other transaction will require a new credential. The
process is similar to the one-time-use credit card numbers that
Citigroup card holders can already generate on the bank's Web site.

... snip ...

being one-time use (as countermeasure to replay attacks) ... which
implies that you have been loaded up with a supply before hand ... or
there is a dynamic interaction to get the credential followed by a
subsequent interaction to validate the credential ...  effectively
having two independent transactions bracketing the actual operation
(so what is to prevent attacking the initial transaction having to do
with the dynamic issuing of the encrypted credential).

a couple recent comments about strategy vis-a-vis x9.59 & FAST
http://www.garlic.com/~lynn/aadsm26.htm#24 IBM donates a new privacy tool to open-source Higgins
http://www.garlic.com/~lynn/2007d.html#10 The logic of privacy

The original PKINIT draft just had registering public key in-lieu of
password, performing a digital signature (with some countermeasure
against replay attack) and validating the digital signature with the
on-file public key. this is similar to this proposal from 1981
... recent post
http://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
with copy of some old email
http://www.garlic.com/~lynn/2006w.html#email810515

... i.e. certificate-less operation
http://www.garlic.com/~lynn/subpubkey.html#certless

it wasn't until sometime later that there was a lot of pressure applied
to include digital certificate mode of operation in pkinit ... misc.
past posts mentioning pkinit and/or early kerberos work
http://www.garlic.com/~lynn/subpubkey.html#kerberos

the token proposal for such operation was aads chip strawman
http://www.garlic.com/~lynn/x959.html#aads

which basically was a chip that was form-factor & interface
(including USB) agnostic and simply performed a digital signature w/o
ever divulging the private key. this was sufficient for establishing
something you have authentication.

The big issue with existing password scheme is that they are shared-secrets ... so that there is requirement for unique shared-secret for
every unique security domain, as a countermeasure against cross-domain
attacks (local garage ISP attacking online banking) ... some past
posts
http://www.garlic.com/~lynn/subintegrity.html#secrets

in the token scenario ... the pin/password is passed to your private
token (for correct operation) ... thus changing it from a shared-secret to just a secret (eliminating needing large number of
different pin/passwords as countermeasure to shared-secret
vulnerabilities).

a little tangential ... there is a separate issue with
institutional-centric token issuance ... resulting in having to carry
around as many unique tokens to manage ... as a person previously had
unique passwords to manage. a few recent posts on the
institutional-centric vis-a-vis person-centric hardware token paradigm
http://www.garlic.com/~lynn/2006q.html#3 Device Authentication - The answer to attacks lauched using stolen passwords?
http://www.garlic.com/~lynn/2007b.html#12 Special characters in passwords was Re: RACF - Password rules
http://www.garlic.com/~lynn/2007b.html#13 special characters in passwords

so another exploit issues for multi-factor authentication ... like a
something you know pin/password ... is evesdropping attacks on the
entry of the pin/password. the digital signature information is
assumed to be sufficient computational integrity that additional
information isn't needed (like pin/password) as countermeasure to
brute force attack. so the purpose of the pin/password is purely as a
countermeasure to lost/stolen token. the assumption here is that
stealing the token is a (relatively) independent operation from
stealing the pin/password (modulo direct physical coercion) ... which
is somewhat the basis for multi-factor authentication assumed to
provide stronger security (i.e. different factors having independent
vulnerabilities).

the issue here is having a person-owned pin/password entry device for
the token ... possibly built into the token itself ... or incorporated
into a cellphone or PDA based operation ... and communicating
wirelessly (rather than via USB).

In the person-centric scenario ... then the same mechanism can be used
for both straight authentication (say in the kerberos scenario) as
well as for integrity (electronic transaction requiring both
authentication and integrity).

Why so little parallelism?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Why so little parallelism?
Newsgroups: comp.arch
Date: Wed, 31 Jan 2007 09:45:06 -0700

previous in this thread:
htttp://www.garlic.com/~lynn/2007b.html#44 Why so little parallelism?

and now ...

IBM's Chief Architect Says Software is at Dead End
http://it.slashdot.org/it/07/01/30/1547235.shtml

and

Where's The Software To Catch Up To Multicore Computing?
http://www.informationweek.com/news/showArticle.jhtml?articleID=197001130

from above:

To make this complex architecture useful to even the most advanced
scientific simulation application developers, much of the work on the
system development is in the programming methodology enablement and
corresponding application framework and tooling.

... snip ...

Unix magic poster

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Unix magic poster
Newsgroups: alt.folklore.computers
Date: Wed, 31 Jan 2007 13:25:27 -0700

Al Balmer <albalmer@att.net> writes:

What timeframe are we talking about. There was an oregano frontend to
spice in the late 90's.

and now for something different ... a different SPICE

misc. previous references to this series of trip reports
http://www.garlic.com/~lynn/2001l.html#61 MVS History (all parts)
http://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
http://www.garlic.com/~lynn/2006n.html#56 AT&T Labs vs. Google Labs - R&D History
http://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?

SPICE reference from part of trip report to CMU 22jul81-24jul81

                 Shifting Towards Personal Computing

Most of what I said above about the advantages of small machines over
large machines is, I believe, also applicable when comparing personal
machines to small machines.  That is, personal machines will probably
have as many advantages over small machines as small machines do over
large machines.

But before I go into that, let me define what I mean by *large*,
*small*, and *personal* machines.  My primary criterion in
categorizing a machine as *large* or *small* is the number of
simultaneous users it typically supports.  The following table is my
general feeling:

               1 user   -  personal machine
        2 to  10 users  -  very small machine
       10 to  25 users  -  small machine
       25 to  50 users  -  medium machine
       50 to 150 users  -  large machine
      150 to 300 users  -  very large machine
        over 300 users  -  enormous machine

Of course, the larger machines are generally faster and have more
memory and storage as well as more users.  But for a machine to be
effective, regardless of the number of users it supports, it must
deliver a certain amount of computing power to each user and there
must be available a certain amount of memory and storage per user.  As
suggested above, there seems to be quite a bit of evidence to indicate
that doubling the MIPS, memory, storage, and number of users, results
in less of everything for everyone.

Several people at CMU seem to feel that the natural extension of this
is the personal computer where a fixed amount of compute power and
memory are dedicated to a single user and not subject to load
fluctuations or other user's hardware or software failures.  The SPICE
people at CMU seem to feel that such a machine would need about 1 MIPS
of compute power and about 1 Mbyte of memory plus around 10 Mbyte of
DASD part of which should be on a removable medium.

Current technology seems to fall just short of providing this
combination at an affordable price, but it's close and getting closer.

I tend to agree with the SPICE people that we should be heading toward
personal machines and should begin getting them for our Computer
Science researchers even if they cost 10 times what we'd like to pay
for them

The cost will come down dramatically and we need to get leading edge
experience with machines that will be cost effective 4-5 years from
now which means we'll have to pay much higher prices today.  The
alternative is to work with today's cost effective technology and gain
very little experience on how to use tomorrow's.

... snip ...

                   The Computer Science Department

The goal of the computer science department computer facilities
is to optimize the productivity of researchers,
and to provide sufficient cycles for the various research projects.
They want to provide a minimally constrained solution space
for the researchers.

"Solve the problem, then specifiy the requirements"

 The department is committed to doing research with equipment that
will be available in 3 to 5 years; thus it costs much more to simulate
that equipment with currently available gear.  They view such capital
expenditures as leverage for their researchers.  Try to choose
productivity of the users over throughput of the systems - minimize
administrative overhead and constraints.

The computer science department personnel are as follows:

• 40 faculty and researchers
• 80 graduate students
• 55 staff, including administrators, secretaries, programmers,
engineers, operators, technicians

Systems and Their Use

The computer science department has several different
kinds of machines:

• General purpose time sharing
• Project machines
• Personal machines
• research systems
• connectivity and networking
• special resources

... snip ...

                          The SPICE Project

For a complete description of the Spice project, see
"Research in Personal Computing at Carnegie-Mellon University,
Peter G. Hibbard, 25 November 1980, Spice Document S008"

Spice, *Scientific Personal Integrated Computing Environment* is a
major research project currently underway at CMU.

Spice is aimed at increasing user productivity. The environment will:

• Comprise at least 100 personal computers connected in a high
bandwidth network, providing facilities for scientific computing.
• Provide access to shared facilities such as printers and filing
systems.
• Provide a consistent style of user interaction for all the software
components.
• Provide tools to encourage modular extension and enhancement of the
software during its lifetime.

Work started on Spice during the summer of 1979. It is expected that a
version of the system will be available to users by 1983; and
essentially complete by 1985.  The computer science department is
heavily committed to using Spice for its principal computing resources
until the 1990's.

The Spice machine is a 2 to 4 mips processor, 1 megabyte of memory, a
100 megabyte disk, a full page APA display, tablet, and a 10 megabit
ethernet connection. While CMU is using the Perq as a Spice
development machine, they feel that it is under powered, and does not
represent what will be needed in the second half of this decade.

The machines will be connected via the 10 megabit ethernet, and will
share a common file system, with the local disk being managed as a
cache to the primary file server(s). Thus the system will give the
appearance of a large timesharing system, yet have all the advantages
of personal, separate machines.

... snip ...

Pennsylvania Railroad ticket fax service

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Pennsylvania Railroad ticket fax service
Newsgroups: alt.folklore.computers
Date: Thu, 01 Feb 2007 09:01:47 -0700

Dave Pitts <dpitts@cozx.com> writes:

Also, IBM and MIT did have success with multi user support on an IBM
7094 running CTSS. So, the same PTFs (hardware additions to add new
features like memory protection) could have been used in the SABRE
project.

and some number of the CTSS people went on to do multics on the 5th
flr ... and others went on to do cp67 (virtual machines, which morphed
into vm370 and current generation) on the 4th flr. lots of past posts
about 4th flr
http://www.garlic.com/~lynn/subtopic.html#545tech

"The Elements of Programming Style"

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: "The Elements of Programming Style"
Newsgroups: alt.folklore.computers
Date: Thu, 01 Feb 2007 09:08:46 -0700

Greg Menke <gdmnews@toadmail.com> writes:

OS X is much like a *nix when it comes to filesystem stuff, and it does
lack the process and user weirdness that cygwin can't quite mask.  What
I was trying to say that the X Windows related features of OS X are
slightly more annoying to make work than under Cygwin.  In Cygwin you
can get the X server/client (never can remember which is which) running
easily enough, then open a bash and things work reasonably.  Its
somewhat more tedious to get the X thing running in OS X and then figure
out the resources, why the stupid TERM is wrong, and WTF are the keymaps
doing..etc..

OS X's shell is lots faster than cygwin though and I'd tend to trust
shell scripts on OS X a lot more than under cygwin.

i.e. originated as MACH from CMU. in that area ... there was project
Athena at MIT (jointly sponsored by IBM and DEC equally for total of
$50m) ... and the stuff at CMU; mach, Camelot, Andrew, etc (sponsored
by IBM for $50m). some

misc. past posts mentioning mach:
http://www.garlic.com/~lynn/2000.html#64 distributed locking patents
http://www.garlic.com/~lynn/2000e.html#27 OCF, PC/SC and GOP
http://www.garlic.com/~lynn/2001.html#44 Options for Delivering Mainframe Reports to Outside Organizat ions
http://www.garlic.com/~lynn/2001b.html#14 IBM's announcement on RVAs
http://www.garlic.com/~lynn/2001f.html#22 Early AIX including AIX/370
http://www.garlic.com/~lynn/2001f.html#23 MERT Operating System & Microkernels
http://www.garlic.com/~lynn/2001n.html#35 cc SMP
http://www.garlic.com/~lynn/2002i.html#54 Unisys A11 worth keeping?
http://www.garlic.com/~lynn/2002i.html#73 Unisys A11 worth keeping?
http://www.garlic.com/~lynn/2002o.html#32 I found the Olsen Quote
http://www.garlic.com/~lynn/2002o.html#40 I found the Olsen Quote
http://www.garlic.com/~lynn/2003.html#46 Horror stories: high system call overhead
http://www.garlic.com/~lynn/2003.html#50 Origin of Kerberos
http://www.garlic.com/~lynn/2003c.html#32 Early attempts at console humor?
http://www.garlic.com/~lynn/2003c.html#45 Early attempts at console humor?
http://www.garlic.com/~lynn/2003e.html#25 A Speculative question
http://www.garlic.com/~lynn/2003e.html#33 A Speculative question
http://www.garlic.com/~lynn/2003g.html#9 Determining Key Exchange Frequency?
http://www.garlic.com/~lynn/2003i.html#66 TGV in the USA?
http://www.garlic.com/~lynn/2003j.html#72 Microkernels are not "all or nothing". Re: Multics Concepts For
http://www.garlic.com/~lynn/2004c.html#53 defination of terms: "Application Server" vs. "Transaction Server"
http://www.garlic.com/~lynn/2004h.html#42 Interesting read about upcoming K9 processors
http://www.garlic.com/~lynn/2004k.html#50 Xah Lee's Unixism
http://www.garlic.com/~lynn/2004n.html#9 RISCs too close to hardware?
http://www.garlic.com/~lynn/2005b.html#22 The Mac is like a modern day Betamax
http://www.garlic.com/~lynn/2005c.html#44 [Lit.] Buffer overruns
http://www.garlic.com/~lynn/2005d.html#20 shared memory programming on distributed memory model?
http://www.garlic.com/~lynn/2005g.html#54 Security via hardware?
http://www.garlic.com/~lynn/2005i.html#53 Single Password - Linux & Windows
http://www.garlic.com/~lynn/2005j.html#13 Performance and Capacity Planning
http://www.garlic.com/~lynn/2005j.html#26 IBM Plugs Big Iron to the College Crowd
http://www.garlic.com/~lynn/2005q.html#49 What ever happened to Tandem and NonStop OS ?
http://www.garlic.com/~lynn/2005r.html#43 Numa-Q Information
http://www.garlic.com/~lynn/2006b.html#8 Free to good home: IBM RT UNIX
http://www.garlic.com/~lynn/2006c.html#42 IBM 610 workstation computer
http://www.garlic.com/~lynn/2006c.html#43 IBM 610 workstation computer
http://www.garlic.com/~lynn/2006l.html#43 One or two CPUs - the pros & cons
http://www.garlic.com/~lynn/2006m.html#10 An Out-of-the-Main Activity
http://www.garlic.com/~lynn/2006m.html#14 The AN/FSQ-31 Did Exist?!
http://www.garlic.com/~lynn/2007b.html#16 V2X2 vs. Shark (SnapShot v. FlashCopy)

Jim Gray Is Missing

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Jim Gray Is Missing
Newsgroups: alt.folklore.computers
Date: Fri, 02 Feb 2007 09:11:08 -0700

re:
http://www.garlic.com/~lynn/2007d.html#4 Jim Gray Is Missing
http://www.garlic.com/~lynn/2007d.html#6 Jim Gray Is Missing
http://www.garlic.com/~lynn/2007d.html#8 Jim Gray Is Missing

recent reference

Sea too vast for man, machine, SEARCHERS GRASPING AT THEORIES AS DAYS
PASS WITHOUT CLUES
http://www.mercurynews.com/mld/mercurynews/business/technology/16607490.htm

From Jim's past ...  this is shorter version dated 20Sep80, there is
also one about twice as long from four days later later dated 24Sep80,
copy located here:
http://research.microsoft.com/~gray/papers/CritiqueOfIBM%27sCSResearch.doc




                   MIP Envy: a Programming Complex
                   Jim Gray, IBM Research, San Jose
                          September 20, 1980

When I left UC Berkeley to join IBM I was surprised to find that the
university provided better computing services than IBM.  IBM offered
fewer languages, poorer machine response and availability, and
half-duplex terminals which took a lot of getting used to.

That was nine years ago.  Things have improved.  We now have full
screen terminals, big address spaces, bigger disks and a network.  But
response times to trivial operations are still long.  We still do not
have a language which is "nice", has an incremental compiler and a
symbolic debugger with type checking.  The programming languages (PLI
and PLS) and text editing system (SCRIPT) I use are typical of 1970
software.

In this nine year period computers have gotten about ten times
cheaper.  So we should have ten times as much.  I don't have ten times
as much.  In fact we go through a cyclic feast-then-famine so that
about 25% of the time computing services are so bad that everyone is
screaming and finally the next increment of computing is "justified".

As I look at my colleagues at Bell Labs (the UNIX group), Xerox or
Stanford I see that they have a much better programming environment
than we do.  I feel bad about this and have developed a complex called
MIP envy.  Its not just envy of other people's MIPS, but also envy
of languages, editors, debuggers, mail systems and networks.  But MIP
envy is a term every IBM programmer will relate to.  I believe it is a
common complex among software people in IBM research.

The tragedy is that IBM Research has it much better than the rest of
IBM.  Right now at IBM's Santa Teresa development lab, people can only
log on at certain times and cannot compile during prime shift
(compiles take over 30 minutes and so consume too much of the person's
shot at the machine).  This situation colors people's designs and
tends to make the designs more batch oriented and less interactive and
hence less easy to use.  It is ironic that the typical IBM development
programmer has poorer computing facilities than the typical airlines
ticket agent.

The tool situation is exemplified by the state of IBM's system
programming language PLS.  PLS was created in the late sixties but the
PLS group was disbanded in the early days of FS.  The PLS group was
reconstituted in 1976 by the Poughkeepsie lab. It supports PLS only
on MVS (not VM or DOS)).  So PLS3 is not supported on Release 6 of VM
and hence most development shops have not moved to that release (which
came out about a year ago)!  People at Endicott are taking the
Structured Programming verbs (SELECT, boolean expressions, etc.)  out
of System R because PLS is not supported on DOS.  To give a grim
example of the fate of tool builders, the author of VMSG (the
electronic mail system we all use) was ordered not to work on it
anymore!  It is now supported by a informal group (not including the
author of VMSG).  There is no shortage of such stories.  IBM
development programmers have very primitive tools.

Computer research must aim its ideas for machines ten years in the
future (System R started in 1974 and will enter the market in 1982).
It is tough to deal with a sixteen year gap: working on eight year old
machines for a product eight years in the future.

Computer research must attract bright young people with new ideas.
Such people show little interest in IBM after seeing the facilities at
Xerox, Bell or Stanford.  In addition, there is a slow flow of good
people out of IBM.  System R lost its best programmer to Xerox (in
1976).  He gave MIP envy as his reason for leaving.

I think it is bad business to provide inadequate computing services
because:
• Good computing services increase programmer productivity.
• One cannot design systems for the eighties when confronted with the
hardware and software of the sixties.
• Good computing services are a tax-free fringe benefit that the
company can offer its programmers.
• Programmers leave IBM because the programming environment is better
elsewhere.

Some of the main reasons for this bad situation are:
• We get "old" hardware (the 168 was designed in 1970 and is priced at
1975 prices),
• No one in IBM funds tool building.  As a result, the tools are
bootlegged and are flaky.
• Timesharing encourages "optimization" in which machines are
configured to saturate at peak periods (i.e. when people come to work).
So unless you are a night owl, you work on a saturated machine.

I can point to several projects I have not undertaken because
computing resources were insufficient (e.g. fuzzy dump in System R),
and others in which I had to do a poor job because the machines were
so slow or the tools were so bad.

The conversion of System R to MVS took two years largely because the
MVS system was second level on VM.  Simple things like a TSO logon
took 15 minutes!  Complex things took hours.  The project would have
taken six months if reasonable machine services had been available.

The Rendezvous project ended one day when we were moved from a 168 to
a 158.  The program just ran too slowly to be interactive.

Many of the bugs found in System R could have been caught by a type
checker which compares the types of formal and actual parameters
(called Lint on UNIX).  Such a tool would have paid for itself on just
the System R project.  As it was, we had to write more basic tools
such as an IO library, cross-reference, trace facility, driver and
interactive debugger.  These tools are too flaky to be of much use to
anyone but us (they are documented by example and oral tradition).
Each of these tools should have existed before we started.

Les Belady showed fairly clearly that tools are not the problem with
programming.  Managing programming and designing programs are the real
problems.  But there are no obvious solutions to these problems.
There are lots of good ideas in the tools area.  Tools are one area
where a relatively small investment will make substantial improvements
to one part of the programming problem.

IBM should provide better computing hardware and software to its
programmers.  This means spending some money and recognizing and
encouraging people who make good tools.  I do not recommend a tool
department or a tool taskforce or a tool memo from the Corporate
Technical Committee.  Good and experienced programmers are difficult
to hire and keep.  One thing that attracts good programmers is good
computing services.

... snip ... top of post, old email index

recent post
http://www.garlic.com/~lynn/2007.html#1 "The Elements of Programming Style"
with couple emails from the period making reference to MIP envy
(and Jim leaving for Tandem):
http://www.garlic.com/~lynn/2007.html#email801006
http://www.garlic.com/~lynn/2007.html#email801016

references for a few terms used in the above:

"System R" is the original relational/SQL project ... some number
of posts here
http://www.garlic.com/~lynn/submain.html#systemr

*FS* in the above refers to "Future System" project, some number
of posts here
http://www.garlic.com/~lynn/submain.html#futuresys

*DOS* in the above doesn't refer to the PC "DOS" ... but to the 360
"disk operating system" ... an entry level 360 operating system
... simpler than OS/360 (and less resource requirements) ... but more
complex than "TOS" (tape operating system).

*SCRIPT* was document formatting application, originally developed at
the science center for CMS in the mid-60s. GML (precursor to SGML,
HTML, XML, etc) was invented at the science center in '69. SCRIPT
was then enhanced to also have support for GML tags. misc. collected
posts
http://www.garlic.com/~lynn/submain.html#sgml

recent reference to STL's log-on restriction policies
http://www.garlic.com/~lynn/2007c.html#12
with old email about "group fairshare" contributing to STL (now called
Silicon Valley Lab) relaxing the (above referenced) controlled
"log-on" policies
http://www.garlic.com/~lynn/2007c.html#email830709

After Jim left for Tandem, we would periodically go by and visit,
especially on Friday afternoons when beer was served. There was also a
computer mailing list, online discussion that started up which came to
be called Tandem Memos ... concerning some of the topics mentioned
in MIPENVY as well as some of the stuff that came out of Friday
afternoon discussions. I got a lot of blame for Tandem Memos,
recent post (also mentioning Jim and Tandem) with reference
http://www.garlic.com/~lynn/2006w.html#46
and recent post with lots of old posts mentioning Tandem Memos
http://www.garlic.com/~lynn/2006w.html#35

The visits and trip reports in the summer of '81 were somewhat an
outcome of both MIPENVY and the Tandem Memos. Some posts containing
portions of the series of trip reports
http://www.garlic.com/~lynn/2001l.html#61 MVS History (all parts)
http://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
http://www.garlic.com/~lynn/2006n.html#56 AT&T Labs vs. Google Labs - R&D History
http://www.garlic.com/~lynn/2006t.html#37 Are there more stupid people in IT than there used to be?
http://www.garlic.com/~lynn/2007d.html#14 Unix magic poster

Starting in the late 70s, I somewhat sponsored a Friday after work,
typically at one of the local establishments within several blocks of
bldg. 28.  Jim was frequently a regular at such events ... and they
periodically would go on until late in the evening (sometimes until
they threw us out). It was at one such gathering that Jim and I
concocted the idea of online telephone books ... as a ploy to get
executives to use online computing. Misc. past posts mentioning the
subject:
http://www.garlic.com/~lynn/2003b.html#45 hyperblock drift, was filesystem structure (long warning)
http://www.garlic.com/~lynn/2004c.html#0 A POX on you, Dennis Ritchie!!!
http://www.garlic.com/~lynn/2005c.html#38 [Lit.] Buffer overruns
http://www.garlic.com/~lynn/2005c.html#43 History of performance counters
http://www.garlic.com/~lynn/2005t.html#44 FULIST
http://www.garlic.com/~lynn/2006b.html#9 Is there a workaround for Thunderbird in a corporate environment?
http://www.garlic.com/~lynn/2006v.html#32 Effi[ci]ency of branch table vs individual compare & branch
http://www.garlic.com/~lynn/2006w.html#12 more secure communication over the network
http://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels

and some definitions from old jargon file ...

[MIP envy]
n. The term, coined by Jim Gray in 1980, that began the
Tandem Memos (q.v.). MIP envy is the coveting of other's
facilities - not just the CPU power available to them, but also
the languages, editors, debuggers, mail systems and
networks. MIP envy is a term every programmer will
understand, being another expression of the proverb The
grass is always greener on the other side of the fence.

[Tandem Memos]
n.  Something constructive but hard to control; a fresh of breath air
(sic). "That's another Tandem Memos." A phrase to worry middle
management. It refers to the computer-based conference (widely
distributed in 1981) in which many technical personnel expressed
dissatisfaction with the tools available to them at that time, and
also constructively criticized the way products were [are] developed.
The memos are required reading for anyone with a serious interest in
quality products. If you have not seen the memos, try reading the
November 1981 Datamation summary.

IBMLink 2000 Finding ESO levels

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBMLink 2000 Finding ESO levels
Newsgroups: bit.listserv.vmesa-l,alt.folklore.computers
Date: Fri, 02 Feb 2007 13:50:16 -0700

ref:
http://www.garlic.com/~lynn/2007b.html#55 IBMLink 2000 Finding ESO levels

other ancient HONE references:


From: wheeler
To: east coast
Date: 02/16/79  16:24:41

would you pass on to YYYYYY. HONE people have been led to understand
that they should start working on converting to MVS since there will
not be any more VM for the high end. specific details started at CCDN
task force meeting (which some HONE people belong) got a presentation
from XXXXXX (they were not sure of the spelling), DP Product Group
POK. VM remains strategic for low end, but there will definitely not be
any for the high end. HONE were told by same that they could solve
their MVS performance problems by rewriting all their VSAPL
application code in assembler.

... snip ... top of post, old email index


From: wheeler
To: distribution
Date: 02/20/79  15:41:25

VM project office has been active on file I sent out. XXXXXX may
have been using the wrong set of flip charts when he made his
presentation and steps are being taken to

1) assure HONE that nothing of the sort is intended

and

2) make sure that it is not repeated

... snip ... top of post, old email index

I have some vague recollection that XXXXXX had been in charge of the
resource manager component of FS ... and in old discussions with that
group, telling them that I thot what i had already implemented for
dynamic adaptive resource management was better than what they were
spec'ing for FS. misc. past posts mentioning future system project
http://www.garlic.com/~lynn/submain.html#futuresys

This scenario about HONE having to convert to MVS was just one
in a long series ... relatively recent related post
http://www.garlic.com/~lynn/2006o.html#53 The Fate of VM - was: Re: Baby MVS????

HONE provided vm370-based, online, interactive service for world-wide
sales, marketing and field people. HONE had started out with clone of
the science center's cp67 and then later converted to vm370 ...  and
eventually HONE clones started popping up all over the world.

One of HONE (apl) major applications were the configurators which
basically filled out the sales order. Mainframe orders typically
required complex combination of options and features (with lots of
interdependencies) dependent on specific customer configurations.

Over 15yr period, I provided HONE custom built cp67 and then vm370
systems, I even got to personally install some of the clones.
misc. past posts mentioning HONE
http://www.garlic.com/~lynn/subtopic.html#hone

Pennsylvania Railroad ticket fax service

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Pennsylvania Railroad ticket fax service
Newsgroups: misc.transport.rail.americas,alt.folklore.computers
Date: Fri, 02 Feb 2007 14:44:15 -0700

David Lesher <wb8foz@panix.com> writes:

As I recall, they used a pre-ASCII protocol called something like
"ALPS" for Air Line Passenger System, as they were the first folks
to swap data between companies. I saw the protocol on a HP serial data
analyzer decades ago...I think it was 6 bit.

from long ago and far away


To: wheeler
Date: 80/04/17  23:12:11

do you have interest in this scheme?  are there problems you can see,
before going ahead?  your suggestions will be appreciated.

I have proposed, and American Airlines has informally accepted
(pending two sets of lawyers working out their problems) that American
provide IBM with a data line to their SABRE system, which is used for
reservations, seat assignment, ticketing, and message transmission.
WHAT WE NEED TO CONTINUE IS THE LEGAL MACHINERY FOR A JOINT STUDY,
STARTING WITH A LETTER OF INTENT (or whatever).

< ... snip ... lots of corporate, legal and infrastructure issues ... >

Technicalities:

The line will be a 4800 baud ALC-code (6 bits) line to Hartford.  It
will terminate in our 3705, which needs (I believe) an RPQ to a 1H
(SDLC) line set and an RPQ to a type 3 scanner to support ALC.  The VM
SE for the American account, XXXXXX (8-nnn-nnnn) is advising me on
this, and sending ALC documentation.

The line will be supervised by a virtual machine, probably PVM, which
will handle the physical details of the line (code and protocol), and
by another virtual machine which will be the server, formatting the
requests as appropriate, and returning the responses to the issuer.
It is possible that we will use YYYYYY's software which currently
handles the ITPS network supervision.

< ... snip ... lots of other infrastructure issues ... >

... top of post

old thread with mention of even older thread/discussion of ALC
http://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back

ACP (airline control program) "operating system" was getting near the
point where they would make the name change to TPF (transaction
processing facility) ...  since you were started to find some number
of large financial operations using it for financial transactions.

SABRE was the American system, united had their own ACP system as well
as eastern airlines. ACP/TPF wasn't going to get multiprocessor
support for some time ... so it tended to be run on loosely-coupled
clusters of single-processor machines ... and the airlines tended to
try and get the largest they could, eastern had ACP running on
370/195.

later, AMADEUS (European reservation system) effort would start out
using eastern's system as starting point (later part of the 80s). My
wife did a short stint as AMADEUS chief architect. misc. past posts
mentioning AMADEUS:
http://www.garlic.com/~lynn/2001g.html#50 Did AT&T offer Unix to Digital Equipment in the 70s?
http://www.garlic.com/~lynn/2001h.html#76 Other oddball IBM System 360's ?
http://www.garlic.com/~lynn/2003d.html#67 unix
http://www.garlic.com/~lynn/2004b.html#6 Mainframe not a good architecture for interactive workloads
http://www.garlic.com/~lynn/2004m.html#27 Shipwrecks
http://www.garlic.com/~lynn/2004o.html#23 Demo: Things in Hierarchies (w/o RM/SQL)
http://www.garlic.com/~lynn/2004o.html#29 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005f.html#22 System/360; Hardwired vs. Microcoded
http://www.garlic.com/~lynn/2005p.html#8 EBCDIC to 6-bit and back
http://www.garlic.com/~lynn/2006o.html#4 How Many 360/195s and 370/195s were shipped?
http://www.garlic.com/~lynn/2006r.html#9 Was FORTRAN buggy?
http://www.garlic.com/~lynn/2006y.html#14 Why so little parallelism?

Intel prepares to kill off the Pentium 4

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Intel prepares to kill off the Pentium 4
Newsgroups: comp.os.vms,alt.folklore.computers
Date: Sat, 03 Feb 2007 10:39:49 -0700

pechter@pechter.dyndns.org (William Pechter) writes:

I was on the IT staff of Concurrent Computer Corporation back then and
we were putting in the SynOptics LattisNet like crazy.  The differences
were enough to keep the Ethernet IEEE standard cards and hubs from
functioning on the same hub.

We swapped over quickly to the standard cards as we upgraded machines
and hubs.  The one thing to remember is the SynOptics guys didn't make
the cards we used -- so the LattisNet stuff disappeared from vendors pretty
quickly.

in the late 80s ... we put in synoptics lattisnet into bldg. 86
(almaden research center, brand new bldg., moved into in 1986)
... which had been plumbed for token-ring ... and so went in on
(shielded) cat-5 ... and bldg. 29 (los gatos lab, which had been built
in the 60s) ... and happen to have significant number of unshielded
twisted-pair already running to each office.

we were started to make customer executive presentations on 3-tier
architecture and middle-layer/middleware type configurations
http://www.garlic.com/~lynn/subnetwork.html#3tier

and taking heat from the SAA and token-ring forces ... as i've
mentioned before ... SAA could be construed as attempting to
maintain the terminal emulation infrastructure (and attempting
to return the 2-tier, client/server genie back to the bottle)
http://www.garlic.com/~lynn/subnetwork.html#emulation

one of the things that almaden was finding was that star-wired
ethernet configuration had both lower latency and higher aggregate
thruput ... than running as 16mbit token-ring.

misc. old thread/post
http://www.garlic.com/~lynn/96.html#17 middle layer
http://www.garlic.com/~lynn/2005q.html#18 Ethernet, Aloha and CSMA/CD
http://www.garlic.com/~lynn/2005u.html#50 Channel distances

How many 36-bit Unix ports in the old days?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: How many 36-bit Unix ports in the old days?
Newsgroups: alt.folklore.computers
Date: Sun, 04 Feb 2007 09:43:21 -0700

Dave Daniels <dave_daniels@127.0.0.1> writes:

Some years ago, the place where I worked had a 3032 processor.  This
one was water cooled. An IMPL used to take ages. We used to reckon
it was waiting for the water to come to the boil.  There was also a
question of who you called when the machine went wrong: an engineer
or a plumber?

3032 was repackaged 168-3.

as mentioned before, the future system project absorbed lots of
the corporations tactical and strategic efforts
http://www.garlic.com/~lynn/submain.html#futuresys

and when it was killed, there was all sorts of scurrying around.

so 158-3 had microcode engine with both a set of microcode that
supported six "integrated" channels ... as well as microcode that
supported 370 processor execution.

for the 303x ... they repackaged a 158-3 microcode engine w/o the 370
microcode; just the integrated channel microcode and called it a
"channel director".

a 3031 was then a repackaged 158-3 microcode engine w/o the integrated
channel microcode; just the 370 microcode with a separate external
"channel director" box (i.e. might call it a multiprocessor ... but
the two microcode engines were doing different things).

a 3032 was then a repackaged 168-3 ... configured with one or more
(up to three for 16 channels) channel director boxes.

a 3033 was the 168-3 "wiring diagram" remapped to faster technology.

now when you powered on a processor box ... things were typically
set-up so that the processor completed its power up and its impl
... and then it started a sequential power-up sequence on the external
boxes ...  channels (channel director), control units, disks, and
other devices.  A configuration might easily have 30-60 boxes
... where the processor would power up (and microcode load) followed
by sequentially doing power-up sequence on each of the other boxes in
the configuration.

The power-up of an external boxes might also have their own microcode
load as part of the power-on sequence i.e. floppy disks were
originally developed for 3830 disk controller microcode load ... and
then also got used for processor microcode loads; recent reference
http://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?

So 3032 power up ... would include microcode load for the 3032, and
then it would have to power sequence the channel directors, i.e. 158-3
microcode engines, which would individual power-up and do their own
microcode load, and then the various i/o control units powered up
along with their own microcode loading.

for additional drift ... as part of the i/o reliability enhancements
for the engineering labs (rewrote the i/o supervisor)
http://www.garlic.com/~lynn/subtopic.html#disk

one of the tricks was how to force a bollixed up channel director (on
the 3033 in bldg. 15) to re-impl under software control from the
processor (i.e. a misbehaving engineering control unit or device could
get the channel director into a state requiring the channel director
to be reset). so it turned out that if you did a very fast
Halt-channel/Clear-channel command sequence to each of the channel
director's channels ... the channel director would graciously re-impl
... and there was a similar convention for various control units.

the 158-3/3031 was air cooled ... but the other processors had water cooled
heat exchange (fluid circulating inside the processor was closed loop
with heat exchange interface to external liquid cooling). old
posts mentioning glitch in the thermal and flow sensing that would
automatically shut-off power
http://www.garlic.com/~lynn/2000b.html#36 How to learn assembler language for OS/390 ?
http://www.garlic.com/~lynn/2000b.html#38 How to learn assembler language for OS/390 ?
http://www.garlic.com/~lynn/2001k.html#4 hot chips and nuclear reactors
http://www.garlic.com/~lynn/2002d.html#13 IBM Mainframe at home
http://www.garlic.com/~lynn/2004p.html#35 IBM 3614 and 3624 ATM's
http://www.garlic.com/~lynn/2004p.html#36 IBM 3614 and 3624 ATM's
http://www.garlic.com/~lynn/2004p.html#41 IBM 3614 and 3624 ATM's

various past posts mentioning 303x machines &/or 303x channel directors:
http://www.garlic.com/~lynn/97.html#20 Why Mainframes?
http://www.garlic.com/~lynn/99.html#7 IBM S/360
http://www.garlic.com/~lynn/99.html#187 Merced Processor Support at it again
http://www.garlic.com/~lynn/2000.html#78 Mainframe operating systems
http://www.garlic.com/~lynn/2000c.html#69 Does the word "mainframe" still have a meaning?
http://www.garlic.com/~lynn/2000d.html#7 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000d.html#11 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000d.html#12 4341 was "Is a VAX a mainframe?"
http://www.garlic.com/~lynn/2000d.html#21 S/360 development burnout?
http://www.garlic.com/~lynn/2000g.html#11 360/370 instruction cycle time
http://www.garlic.com/~lynn/2001b.html#39 John Mashey's greatest hits
http://www.garlic.com/~lynn/2001b.html#83 Z/90, S/390, 370/ESA (slightly off topic)
http://www.garlic.com/~lynn/2001j.html#3 YKYGOW...
http://www.garlic.com/~lynn/2001l.html#24 mainframe question
http://www.garlic.com/~lynn/2001l.html#32 mainframe question
http://www.garlic.com/~lynn/2002.html#36 a.f.c history checkup... (was What specifications will the standard year 2001 PC have?)
http://www.garlic.com/~lynn/2002.html#48 Microcode?
http://www.garlic.com/~lynn/2002d.html#7 IBM Mainframe at home
http://www.garlic.com/~lynn/2002f.html#8 Is AMD doing an Intel?
http://www.garlic.com/~lynn/2002i.html#23 CDC6600 - just how powerful a machine was it?
http://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
http://www.garlic.com/~lynn/2002p.html#59 AMP  vs  SMP
http://www.garlic.com/~lynn/2003.html#39 Flex Question
http://www.garlic.com/~lynn/2003g.html#22 303x, idals, dat, disk head settle, and other rambling folklore
http://www.garlic.com/~lynn/2003g.html#32 One Processor is bad?
http://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
http://www.garlic.com/~lynn/2004.html#9 Dyadic
http://www.garlic.com/~lynn/2004.html#10 Dyadic
http://www.garlic.com/~lynn/2004d.html#12 real multi-tasking, multi-programming
http://www.garlic.com/~lynn/2004d.html#64 System/360 40 years old today
http://www.garlic.com/~lynn/2004e.html#51 Infiniband - practicalities for small clusters
http://www.garlic.com/~lynn/2004f.html#21 Infiniband - practicalities for small clusters
http://www.garlic.com/~lynn/2004g.html#17 Infiniband - practicalities for small clusters
http://www.garlic.com/~lynn/2004g.html#50 Chained I/O's
http://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor
http://www.garlic.com/~lynn/2004n.html#14 360 longevity, was RISCs too close to hardware?
http://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005b.html#26 CAS and LL/SC
http://www.garlic.com/~lynn/2005d.html#62 Misuse of word "microcode"
http://www.garlic.com/~lynn/2005e.html#59 System/360; Hardwired vs. Microcoded
http://www.garlic.com/~lynn/2005h.html#40 Software for IBM 360/30
http://www.garlic.com/~lynn/2005m.html#25 IBM's mini computers--lack thereof
http://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their dual-core design
http://www.garlic.com/~lynn/2005q.html#30 HASP/ASP JES/JES2/JES3
http://www.garlic.com/~lynn/2005s.html#22 MVCIN instruction
http://www.garlic.com/~lynn/2006m.html#27 Old Hashing Routine
http://www.garlic.com/~lynn/2006n.html#16 On the 370/165 and the 360/85
http://www.garlic.com/~lynn/2006q.html#31 VAXen with switchmode power supplies?
http://www.garlic.com/~lynn/2006r.html#22 Was FORTRAN buggy?
http://www.garlic.com/~lynn/2006r.html#40 REAL memory column in SDSF
http://www.garlic.com/~lynn/2006s.html#40 Ranking of non-IBM mainframe builders?
http://www.garlic.com/~lynn/2006s.html#42 Ranking of non-IBM mainframe builders?
http://www.garlic.com/~lynn/2006t.html#19 old vm370 mitre benchmark

How many 36-bit Unix ports in the old days?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: How many 36-bit Unix ports in the old days?
Newsgroups: alt.folklore.computers
Date: Sun, 04 Feb 2007 09:59:42 -0700

jmfbahciv writes:

I was always taught that water and electricity can't mix.  I
always had an illogical superstition about water-cooled gear :-).

If you read Lynn's blurb about what IBM did during that IPL,
the boot did a lot more than type a dot on each user's TTY.
That's all that our OS had to do when reloading.  Eh! Not
quite all--the other task was zeroing all of memory before
allowing any access.

so this is the blurb about power-on sequence
http://www.garlic.com/~lynn/2007d.html#21 How many 36-bit Unix ports in the old days?

and this is recent posts about fast reboot after some sort of system
glitch ... that would include writing image of storage to disk,
checkpointing various other pieces of stuff and then rebooting.
http://www.garlic.com/~lynn/2007c.html#41 How many 36-bit Unix ports in the old days?
and description here about redoing parts of the startup function:
http://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?

note, later machines had service processors that had to power-on and
impl before the processor (followed by powerup/impl sequence for the
rest of the boxes in the configuration). in the case of the 3090, the
"service processors" were a pair of 4361 processors which would
power-on, impl their microcode, and then boot a customized version of
vm370 release 6 ... which then executed the service processor
functions that would get the 3090 processor up and impl'ed
http://www.garlic.com/~lynn/2007c.html#16 How many 36-bit Unix ports in the old days?

misc. past posts/thread about fast reboot:
http://www.garlic.com/~lynn/2001g.html#52 Compaq kills Alpha
http://www.garlic.com/~lynn/2003p.html#23 1960s images of IBM 360 mainframes
http://www.garlic.com/~lynn/2004o.html#7 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005g.html#30 Moving assembler programs above the line
http://www.garlic.com/~lynn/2005o.html#25 auto reIPL
http://www.garlic.com/~lynn/2005o.html#30 auto reIPL
http://www.garlic.com/~lynn/2006c.html#28 Mount DASD as read-only
http://www.garlic.com/~lynn/2006r.html#41 Very slow booting and running and brain-dead OS's?
http://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?

How many 36-bit Unix ports in the old days?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: How many 36-bit Unix ports in the old days?
Newsgroups: alt.folklore.computers
Date: Sun, 04 Feb 2007 14:33:17 -0700

"Sarr J. Blumson" <sarr@rygar.gpcc.itd.umich.edu> writes:

Definitions are always an issue. At a place where I worked VM was "up"
almost instantly, but by the time all the service machines were running
and you could actually do something that 20 minutes had passed.

re:
http://www.garlic.com/~lynn/2007d.html#22 How many 36-bit Unix ports in the old days?

but the nearly instant up was one of the reasons that it could be
configured for use as the "service processor" (on pair of 4361s) in
3090 ... aka the majority of the "service machines" were not required
for the service processor configuration.

other recent posts mentioning the use in service processor
http://www.garlic.com/~lynn/2007.html#18 IBM sues maker of Intel-based Mainframe clones
http://www.garlic.com/~lynn/2007.html#24 How to write a full-screen Rexx debugger?
http://www.garlic.com/~lynn/2007.html#39 Just another example of mainframe costs
http://www.garlic.com/~lynn/2007b.html#1 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007b.html#15 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007b.html#30 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007c.html#16 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007d.html#1 Has anyone ever used self-modifying microcode? Would it even be useful?

the whole service (virtual) machine concept is showing about again as virtual
appliances deployed by new generations of virtual machine hypervisors; some
discussion in recent thread
http://www.garlic.com/~lynn/2006t.html#46 To RISC or not to RISC
http://www.garlic.com/~lynn/2006w.html#25 To RISC or not to RISC
http://www.garlic.com/~lynn/2006x.html#6 Multics on Vmware ?
http://www.garlic.com/~lynn/2006x.html#8 vmshare

possibly the first couple things on the path to "service machines" ...
was back on cp67 with the combination of 1) auto dump and fast
automatic restart along with 2) prepare command which turned off the
cpu meter (from the days of leased machines and monthly charged based
on what had been logged on the cpu meter). the combination of the two
things allowed time-sharing service to be provided 7x24 at nominal
cost (even off shift and weekends) w/o always requiring an operator to
be present. some of this is discussed in various postings related to
commercial time-sharing offering of cp67 and vm370
http://www.garlic.com/~lynn/submain.html#timeshare

however, the "service machines" still required manual activation.
At the science center, doing a lot of performance testing, I had
developed some automated benchmarking procedures
http://www.garlic.com/~lynn/submain.html#benchmark

... that i were setup to run unattended, non-stop for multiple shifts
at a time. part of the benchmarking involved generating custom
modified kernels with specific features and then doing a "fast" reboot
to start a new set of tests. this required that all the benchmarking
processes had to come up automagically (in service machine controlling
the benchmarks) w/o manual intervention. For this I created the
"autolog" command. This one of the features that were picked up in
and shipped as part of the vm370 release 3 product ... along with
very small subset of the extended virtual memory support
http://www.garlic.com/~lynn/submain.html#mmap
http://www.garlic.com/~lynn/submain.html#adcon

most stuff was relatively quick except the scenario where system had
gone down with power outage and various things weren't saved to disk
for use as part of restart. power outage in cp67 had met that all
"spool" file information was lost. in vm370, spool file
"checkpointing" was added. This was a small subset of spool file
status ... that in recovery after power failure (w/o necessary status
information) ...  the checkpointed information was sufficient to
support a "fsck" type operation ... use the small amount of
information as starting point to scan the spool file disks and
recreate the necessary status information. For a large configuration
with lots of spool files this could take an hour elapsed time (and was
done in early boot sequence ... long before system was opened up to
any sort of other execution and use). this was subject of my "spool
file system" changes ... to both significantly increase the raw
thruput of spool file operation (by possibly two orders of magnitude)
as well as improve the power-failure/chkpt scenario to worst case of
few minutes. a few recent posts on that subject:
http://www.garlic.com/~lynn/2006q.html#27 dcss and page mapped filesystem
http://www.garlic.com/~lynn/2006s.html#7 Very slow booting and running and brain-dead OS's?
http://www.garlic.com/~lynn/2006t.html#45 To RISC or not to RISC
http://www.garlic.com/~lynn/2007c.html#21 How many 36-bit Unix ports in the old days?

of course, in the 3090 "service processor" scenario ... it was
configured so that it didn't have to worry about spool files ... even
in the scenario of restart/reboot after power-failure.

misc. past posts mentioning autolog command (as well as its
automagic execution at kernel boot for activation of service
machines):
http://www.garlic.com/~lynn/2001l.html#32 mainframe question
http://www.garlic.com/~lynn/2002q.html#28 Origin of XAUTOLOG (x-post)
http://www.garlic.com/~lynn/2003j.html#34 Interrupt in an IBM mainframe
http://www.garlic.com/~lynn/2003k.html#49 S/360 IPL from 7 track tape
http://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
http://www.garlic.com/~lynn/2005.html#53 8086 memory space
http://www.garlic.com/~lynn/2005.html#59 8086 memory space
http://www.garlic.com/~lynn/2005o.html#30 auto reIPL
http://www.garlic.com/~lynn/2006w.html#8 Why these original FORTRAN quirks?
http://www.garlic.com/~lynn/2006w.html#16 intersection between autolog command and CMSBACK (more history)
http://www.garlic.com/~lynn/2006w.html#25 To RISC or not to RISC
http://www.garlic.com/~lynn/2006w.html#42 vmshare
http://www.garlic.com/~lynn/2006w.html#44 more secure communication over the network
http://www.garlic.com/~lynn/2006w.html#52 IBM sues maker of Intel-based Mainframe clones
http://www.garlic.com/~lynn/2006x.html#6 Multics on Vmware ?
http://www.garlic.com/~lynn/2006x.html#8 vmshare
http://www.garlic.com/~lynn/2006y.html#7 Securing financial transactions a high priority for 2007
http://www.garlic.com/~lynn/2006y.html#35 The Future of CPUs: What's After Multi-Core?
http://www.garlic.com/~lynn/2007.html#11 vm/sp1
http://www.garlic.com/~lynn/2007.html#14 vm/sp1
http://www.garlic.com/~lynn/2007.html#23 How to write a full-screen Rexx debugger?
http://www.garlic.com/~lynn/2007b.html#7 information utility
http://www.garlic.com/~lynn/2007b.html#31 IBMLink 2000 Finding ESO levels
http://www.garlic.com/~lynn/2007b.html#55 IBMLink 2000 Finding ESO levels

How many 36-bit Unix ports in the old days?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: How many 36-bit Unix ports in the old days?
Newsgroups: alt.folklore.computers
Date: Sun, 04 Feb 2007 14:42:18 -0700

"David Wade" <g8mqw@yahoo.com> writes:

I understand from one of my friend who used to work on MVS that one problem
was on multi box VTAM would run single threaded and even on a multi box and
this slowed startup considerably...

other recent posts in this subthread
http://www.garlic.com/~lynn/2007d.html#21 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007d.html#22 How many 36-bit Unix ports in the old days?
http://www.garlic.com/~lynn/2007d.html#23 How many 36-bit Unix ports in the old days?

doing some work in the mid-80s related to IMS hot-standby ... there
was issue with VTAM having to do with recovery after failure and the
"owning" scp/pu5 rebuilding the session information. for large
configuration with possibly 20,000 sessions to rebuild ... the VTAM
"working set" could quickly exceed available real storage and things
would degenerate effectively into page thrashing off disk. IMS
hot-standby could effectively be up (with replicated cluster operation
... even at geographically remote site) ... but if the MVS with the
owning scp/pu5 (VTAM) for the sessions got cycled ...  its recovery
time could be a multiple hrs.

for other topic drift ... long ago and far away, my wife had been
con'ed into serving a stint in pok responsible for loosely-couple
architecture during that stint she created peer-coupled shared data
architecture
http://www.garlic.com/~lynn/submain.html#shareddata

however, until sysplex came along ... about the only uptake of her
architecture was by the IMS hot-standby group.

modern paging

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: modern paging
Newsgroups: alt.folklore.computers
Date: Mon, 05 Feb 2007 09:53:53 -0700

the 360s & 370s that i worked with in the 60s&70s tended to
have real storage sizes in the 512kbyte to 2mbyte range. cp67 and
vm370 used virtual memory and paging to manage that real storage
... and you needed to control paging activity to keep up good
performance. lots of past posts on the subject of paging, page
replacement algorithms, etc
http://www.garlic.com/~lynn/subtopic.html#wsclock

and some posts with old email discussing various aspects of
the subject
http://www.garlic.com/~lynn/lhwemail.html#globallru

recent post with somewhat related discussion ... mentioning getting
blamed for slipping product schedule on washington (old time xt/370)
by six months when I did several benchmarks and found a lot of
applications "page thrashing" in the 384kbyte storage configuration
...  and it took them awhile to get the product upgraded to 512kbyte
storage configuration.
http://www.garlic.com/~lynn/2007d.html#7 Has anyone ever used self-modifying microcode? Would it even be useful?

now i have a large data intensive analysis program and i run it on a
1.7ghz pentium M and a 3.4ghz pentium 4 ... and it runs nearly twice
as fast on the the 1.7ghz pentium M than it does on the 3.4ghz pentium
4. It turns out that the 3.4ghz pentium 4 has a 512k processor cache
and the 1.7ghz pentium M has a 2mbyte processor cache ... the bigger
processor cache size significantly more than offsets the pentium M
processor running at only have the clock rate (i.e. the processor
caches are on the order of old-time 360/370 real storage sizes)

Securing financial transactions a high priority for 2007

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Securing financial transactions a high priority for 2007
Newsgroups: alt.folklore.computers
Date: Tue, 06 Feb 2007 07:16:45 -0700

Anne & Lynn Wheeler <lynn@garlic.com> writes:

IBM donates new privacy tool to open-source Higgins
http://news.com.com/IBM+donates+new+privacy+tool+to+open-source/2100-1029_3-6153625.html

from above:

For example, when making a purchase online, buyers would provide an
encrypted credential issued by their credit card company instead of
actual credit card details. The online store can't access the
credential, but passes it on to the credit card issuer, which can
verify it and make sure the retailer gets paid

... snip ...

followup reference posting
http://www.garlic.com/~lynn/aadsm26.htm#29 News.com: IBM donates new privacy tool to open-source Higgins</a>

and for a little more drift

Study Finds Bank of America SiteKey is Flawed
http://it.slashdot.org/it/07/02/05/1323243.shtml
The Emperor's New Security Indicators
http://www.usablesecurity.org/emperor/

and part III of some comments
http://www.garlic.com/~lynn/aadsm26.htm#28 man in the middle, SSL

and for latest, new "old" thing

Chip and pin flaws exposed
http://business.guardian.co.uk/story/0,,2006890,00.html
Fraud team exposes chip and pin flaws
http://money.guardian.co.uk/news_/story/0,,2006888,00.html
Fraudsters 'can hijack chip and pin details in-store'
http://www.24dash.com/billpayments/16145.htm
Chip and pin cards hacked
http://www.thesun.co.uk/article/0,,2005300000-2007060040,00.html
Chip and pin fraud warning issued
http://itn.co.uk/news/45ffad463a16cebbcbd0dfe768eb628e.html
Chip-and-pin loophole
http://www.inthenews.co.uk/infocus/features/in-focus/chip-and-pin-loophole-$1049428.htm
Chip-and-pin 'not infallible'
http://www.inthenews.co.uk/news/news/technology/chip-and-pin-not-infallible-$1049429.htm

as discussed in numerous yes card postings ... some of these exploits
have been around since the 90s with the early chip deployments
http://www.garlic.com/~lynn/subintegrity.html#yescard

post from last year
http://www.garlic.com/~lynn/2006l.html#33 Google Architecture

with reference to deployment by ibm at safeways in the 90s
http://www-03.ibm.com/industries/financialservices/doc/content/solution/1026217103.html

from above:

Safeway and its technology partner IBM were involved in the first
"Chip and Pin" trials held in the UK in 1997. Recently, Safeway
engaged IBM again to provide the Electronic Payment System (EPS)
infrastructure in support of the company's push forward with
the introduction of "Chip and Pin"

... snip ...

modern paging

From: lynn@garlic.com
Subject: Re: modern paging
Date: Wed, 07 Feb 2007 11:35:29 -0800
Newsgroups: alt.folklore.computers

hancock4@bbs.cpcn.com wrote:

Wasn't IBM the inventor of the idea of high speed cache storage when
developed for its upper end System/360s?

What language is your data analysis program?

As to your PC application, I wonder how much operating system bloat is
a factor.  When I run Excel spreadsheets and the like on my Pentium
there is a bit of a wait.  When I run old compiled QuickBasic 4.5 or
PDS Basic 7.1 programs on it the speed is utterly incredibly fast, as
is disk I/O.

re:
http://www.garlic.com/~lynn/2007d.html#25 modern paging

when i was doing some stuff on the original relational/sql
implementation
http://www.garlic.com/~lynn/submain.html#systemr

i was also involved in another kind of DBMS implementation ... that
sort of started jointly between some people at STL (now called silicon
valley lab) and bldg.  29 (los gatos vlsi lab) ... that had some early
uptake by the vlsi tools group in bldg.29.

since going on to other things ... i've re-implemented various
versions of this technology from scratch a number of times ... and it
is what i use to maintain and generate the html files for the ietf rfc
index:
http://www.garlic.com/~lynn/rfcietff.htm

and the various merged taxonomies and glossaries that i maintain
http://www.garlic.com/~lynn/index.html#glosnote

a little overview/introduction
http://www.garlic.com/~lynn/index.html

it is implemented in C ... and i've done very extensive optimizing of
the core functions. in this particular case, i was dealing with a
hundred or so mbytes of information.

a few ancient refs
http://www.garlic.com/~lynn/94.html#26 Misc. more on bidirectional links
http://www.garlic.com/~lynn/2004f.html#7 The Network Data Model, foundation for Relational Model
http://www.garlic.com/~lynn/2004q.html#31 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2006v.html#47 Why so little parallelism?
http://www.garlic.com/~lynn/2006v.html#48 Why so little parallelism?
http://www.garlic.com/~lynn/2006w.html#11 long ago and far away, vm370 from early/mid 70s

SVCs

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: SVCs
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Sat, 10 Feb 2007 22:49:02 -0700

Shmuel Metz , Seymour J. wrote:

That's still wrong. The SVC instruction caused an interrupt, period.
It was up to the SVC SLIH to index into the SVC table, etc. There was
no SVC Assist feature on the S/360.

To add to the fun, CP/67 and VM used the Diagnose instruction as a
means for a problem[1] program to cause an interrupt to invoke a
supervisor state routine. The handling was a direct parallel to the
SVC FLIH and SLIH in OS/360; CP had to determine that the interrupt
code was 2, the virtual machine was in virtual supervisor mode and the
opcode was DIAG, then use the DIAG code as an index to the proper
routine.

[1] But virtual supervisor mode.

CP67 on svc interrupt ... had to determine if the svc old psw was in
supervisor state or problem state. if problem state ... a virtual
machine was running ... and then had to go off and reflect an emulated
svc interrupt to the virtual machine. If the svc old psw was in supervisor
state, it was the cp kernel running ... and it had to go off and perform
the function for 0, 4, 8, and 12; mostly "8" which was internal kernel call
and "12" which was internal kernel return.

CP67 on program interrupt ... had to determine if the program old psw
was in supervisor state or problem state ... if supervisor state
... it was a CP67 kernel problem. If the program old psw was problem
state then the virtual machine was running. If it was program
interrupt for privilege instruction and the virtual machine was in
virtual supervisor state ... then the kernel had to emulate the
privilege instruction ... otherwise it emulated a program interrupt to
the virtual machine. For emulation of a privilege instruction, the
kernel had to determine the opcode of the interrupting instruction
... and effectively use decode table for which instruction decode
routing to go off to.

Three people from the science center
http://www.garlic.com/~lynn/subtopic.html#545tech

had come out and installed cp67 the last week in jan68 at the univ.
where i was undergraduate.

That spring and summer I had done a lot of rewrite of the cp67 kernel.
The CP67 kernel used svc 8/12 interrupts for all calls between
internal routines. I rewrote it to cut the processing from about
300mics (per call/return) down to about 80mics. I also implemented a
virtual machine SVC "fastpath" reflect (to the virtual machine)
completely within the kernel SVC FLIH which substantially reduced that
pathlength. As previously mentioned I gave a talk at the aug68 share
meeting in Boston on some of the results ... recent posts:
http://www.garlic.com/~lynn/2007b.html#45 Is anyone still running
http://www.garlic.com/~lynn/2007c.html#45 SVCs

as mentioned in above ... i then changed the internal linkage for
various high-use kernel routines from SVC (interrupt) to straight
BALR.

Somewhere along the way ... I started looking at overhead in CMS
virtual machine ... and noticed that all the disk i/o operations were
effectively done synchronously ... i.e. CMS would do SIO for the disk
I/O and then LPSW into wait state waiting for the disk I/O to
complete. CMS never attempted to any overlapped processing while
waiting for disk i/o. Also, one of cp67 big overhead, long path items
was channel program (CCW) i/o decode and emulation.

So I added some code to CMS that would double check if it was running
in a virtual machine (the CP67 CMS could also run on bare real
hardware), and if so ... instead of doing a regular disk I/O CCW
sequence ... it would do a special disk CCW with x'FF' opcode
... which had parameter list for seek, search, and read/write ...  and
if chained for multiple record transfer. The x'FF' CCW opcode was
special case to quickly decode and emulate and was also defined to be
"immediate" ... i.e. the virtual SIO wouldn't complete until the disk
I/O had finished ... and then it would complete with condition code
one on the SIO (i.e. immediate, csw stored). That also eliminated the
additional internal CMS processing, the virtual LPSW instruction
emulation as well as the virtual I/O interrupt emulation. This cut
typical cp67 supervisor emulation overhead for CMS virtual machine by
well over half (in addition to the other stuff that I had already done
... and also showed up in the FS/360 mft14 benchmarks).

The people at the science center (primarily Bob Adair) explained to me
in gory detail that I wasn't allowed to do that ... since it violated
the purity of the virtual machine architecture (i.e. the channel
program architecture was not defined to do what I had defined for the
x'FF' opcode). However, everybody liked the resulting performance
improvement benefit. So it was explained that there was this
"diagnose" instruction which was described in the 360 principle of
operations to be "model" dependent ... and so it would be possible to
define the abstraction of a virtual machine model ... and when
running a 360 virtual machine MODEL ... cp67 could define how
the diagnose instruction worked (anyway it wanted to). So the code I
had done for (CMS) SIO disk x'FF' CCW got remapped into the diagnose
instruction (with the implementation for the diagnose instruction to
sort of be like SVC kernel call with function codes selecting which
operation was to be performed).

misc. past posts mentioning diagnose instruction
http://www.garlic.com/~lynn/99.html#95 Early interupts on mainframes
http://www.garlic.com/~lynn/2002d.html#31 2 questions: diag 68 and calling convention
http://www.garlic.com/~lynn/2002h.html#62 history of CMS
http://www.garlic.com/~lynn/2003.html#60 MIDAS
http://www.garlic.com/~lynn/2003m.html#36 S/360 undocumented instructions?
http://www.garlic.com/~lynn/2003p.html#9 virtual-machine theory
http://www.garlic.com/~lynn/2003p.html#40 virtual-machine theory
http://www.garlic.com/~lynn/2004.html#8 virtual-machine theory
http://www.garlic.com/~lynn/2004d.html#66 System/360 40 years old today
http://www.garlic.com/~lynn/2004f.html#23 command line switches [Re: [REALLY OT!] Overuse of symbolic
http://www.garlic.com/~lynn/2004q.html#72 IUCV in VM/CMS
http://www.garlic.com/~lynn/2005b.html#23 360 DIAGNOSE
http://www.garlic.com/~lynn/2005b.html#38 Relocating application architecture and compiler support
http://www.garlic.com/~lynn/2005j.html#54 Q ALLOC PAGE vs. CP Q ALLOC vs ESAMAP
http://www.garlic.com/~lynn/2005o.html#35 Implementing schedulers in processor????
http://www.garlic.com/~lynn/2005t.html#8 2nd level install - duplicate volsers
http://www.garlic.com/~lynn/2006w.html#29 Descriptive term for reentrant program that nonetheless is

old tapes

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: old tapes
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Sun, 11 Feb 2007 06:56:02 -0700

Shmuel Metz , Seymour J. wrote:

It is. I have the complete free SCRIPTW; I don't know whether Waterloo
has put the chargeable version in the public domain or whether it is
still proprietary.

the original script was done at the science center in the mid-60s by
stu madnick for cms using runoff-like "dot" commands for document
formating.
http://www.garlic.com/~lynn/subtopic.html#545tech

in '69, "G", "M", and "L" invented GML at the science center ... and
markup tag processing was added to script. later a ISO international
standard was produced as "SGML"; misc. posts mentioning GML, sgml, etc
http://www.garlic.com/~lynn/submain.html#sgml

CERN did a cms/tso "bakeoff" comparison and presented a report to
SHARE circa '74. Internally, the report was labeled "confidential,
restricted" (available on need to know basis only) ... attempting to
limit the number of employees who would be exposed to how badly tso
compared to cms.

waterloo did their own version of the cms script command.

in this URL, it describes the morphing of waterloo script SGML to HTML
at CERN
http://infomesh.net/html/history/early/

and this URL, describes the first WEB server in the US on the vm/cms
system at SLAC ("first server outside of Europe")
http://www.slac.stanford.edu/history/earlyweb/history.shtml

past posts mentioning morph from SGML to HTML and/or the first web
server in the US
http://www.garlic.com/~lynn/2004d.html#53 COMPUTER RELATED WORLD'S RECORDS?
http://www.garlic.com/~lynn/2004l.html#0 Xah Lee's Unixism
http://www.garlic.com/~lynn/2004l.html#72 Specifying all biz rules in relational data
http://www.garlic.com/~lynn/2005.html#27 Network databases
http://www.garlic.com/~lynn/2005e.html#34 Thou shalt have no other gods before the ANSI C standard
http://www.garlic.com/~lynn/2006d.html#35 Fw: Tax chooses dead language - Austalia
http://www.garlic.com/~lynn/2006m.html#55 The System/360 Model 20 Wasn't As Bad As All That

past posts mentioning the CERN cms/tso "bakeoff"
http://www.garlic.com/~lynn/2001i.html#30 IBM OS Timeline?
http://www.garlic.com/~lynn/2001m.html#19 3270 protocol
http://www.garlic.com/~lynn/2002h.html#14 Why did OSI fail compared with TCP-IP?
http://www.garlic.com/~lynn/2002j.html#64 vm marketing (cross post)
http://www.garlic.com/~lynn/2002n.html#54 SHARE MVT Project anniversary
http://www.garlic.com/~lynn/2002o.html#54 XML, AI, Cyc, psych, and literature
http://www.garlic.com/~lynn/2003c.html#53 HASP assembly: What the heck is an MVT ABEND 422?
http://www.garlic.com/~lynn/2003c.html#69 OT: One for the historians - 360/91
http://www.garlic.com/~lynn/2003h.html#19 Why did TCP become popular ?
http://www.garlic.com/~lynn/2003k.html#13 What is timesharing, anyway?
http://www.garlic.com/~lynn/2003o.html#16 When nerds were nerds
http://www.garlic.com/~lynn/2004c.html#10 XDS Si