List of Archived Posts

2000 Newsgroup Postings (05/14 - 07/11)

Financial Stnadards Work group?
A note on the culture of database
Financial Stnadards Work group?
RISC Reference?
TF-1
TF-1
TF-1
A most delicious (non-folkloric) thought.
IBM Linux
Cache coherence [was Re: TF-1]
IBM 1460
IBM 1460
Cache coherence [was Re: TF-1]
Gif images: Database or filesystem?
thread scheduling and cache coherence traffic
Hard disks, one year ago today
Hard disks, one year ago today
write rings
IBM 1460
Hard disks, one year ago today
IBM 1460
Cache coherence [was Re: TF-1]
Cache coherence [was Re: TF-1]
optimal cpu : mem <-> 9:2 ?
Hard disks, one year ago today
Hard disks, one year ago today
The first "internet" companies?
The first "internet" companies?
The first "internet" companies?
The first "internet" companies?
internal corporate network, misc.
The first "internet" companies?
Request for review of "secure" storage scheme
What level of computer is needed for a computer to Love?
What level of computer is needed for a computer to Love?
What level of computer is needed for a computer to Love?
Interdata, Perkin-Elmer, et al.
Interdata, Perkin-Elmer, et al.
Does the word "mainframe" still have a meaning?
WHAT IS A MAINFRAME???
Domainatrix - the final word
Domainatrix - the final word
Domainatrix - the final word
Any Series/1 fans?
WHAT IS A MAINFRAME???
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
WHAT IS A MAINFRAME???
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
WHAT IS A MAINFRAME???
Does the word "mainframe" still have a meaning?
Any Series/1 fans?
WHAT IS A MAINFRAME???
Java and Multos
Does the word "mainframe" still have a meaning?
Definitive SSL explanation please...
Disincentives for MVS & future of MVS systems programmers
Does the word "mainframe" still have a meaning?
Disincentives for MVS & future of MVS systems programmers
TF-1
ANSI X9.62 and X9.63
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Does the word "mainframe" still have a meaning?
Is a VAX a mainframe?
IBM's "ASCI White" and "Big Blue" architecture?
Free RT monitors/keyboards
Unisys vs IBM mainframe comparisons
Unisys vs IBM mainframe comparisons
Unisys vs IBM mainframe comparisons
Unisys vs IBM mainframe comparisons
Is a VAX a mainframe?
Is a VAX a mainframe?
V-Man's Patton Quote (LONG) (Pronafity)

Financial Stnadards Work group?

Date: Sun, 14 May 2000 10:28:21 -0700
To: ietf@ietf.org
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: re: Financial Stnadards Work group?
Musandu writes:
It may just be time for the IETF to develop a financial standards work group separate from the applications work group. I can even forsee a Simple Cash Transfer Protocol? any objections?

There is an ANSI Financial Standards body (X9) which is also chair of the ISO Financial Standards group.

The electronic commerce payments working group (X9A10) has a draft standard for all electronic retail payments (debit, credit, pre-paid, electronic cash, etc) .. X9.59.

misc. ref
http://www.x9.org/
http://www.x9.org/main_organization.html
http://www.x9.org/subcomms/x9a/general/public/general.html
http://www.tc68.org/
http://www.x9.org/n20.html
http://www.garlic.com/~lynn/
http://www.garlic.com/~lynn/99.html#224
http://www.garlic.com/~lynn/8583flow.htm
http://www.garlic.com/~lynn/draft-wheeler-ipki-aads-01.txt

& of course my rfc index is also at:
http://www.garlic.com/~lynn/rfcietff.htm

as well as ietf, payments, security, X9F, and financial glossaries

--
Anne & Lynn Wheeler lynn@garlic.com http://www.garlic.com/~lynn/

A note on the culture of database

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: A note on the culture of database
Newsgroups: alt.folklore.computers
Date: Sun, 21 May 2000 04:53:53 GMT
ehrice@his.com (Edward Rice) writes
In addition, unless the system is 100% reliable (and we're just closing in on that now, we certainly didn't achieve it in the 1970's or 1980's!), you run into update anomalies, interrupted updates, and the serious performance problems that can occur when you get a fully-normalized database and go to make changes in it.

Even when Third Normal was the standard, we usually settled for about 90-95% "compliant" -- we accepted some failure to normalize as a cost of doing business. We usually made at least a mental note that there was a reason for stopping our normalization of design before it was complete, and might note in the code /and/ the documentation exactly what the reasons were.


One of the largest online libraries (been around since the late 60s) attemped to load their indexing schema into a relational database and keep it updated. It hired a large outside organization to do the initial project and then to provide updates every 9 months ... based on 9 months of additions to the indexing infrastructure.

The indexing schema is large ... running to over hundred thousand terms with extremely complicated inter-term relationships. A valent effort got maybe half the terms into a partial relational schema ... but most of the data sat around in totally unnormalized tables ... and even at that the attempted "normalization" efforts were falling behind in real-time ... nine months of new articles and publications with new terms and categorization ... was impacting schedule by more than 29=18 months (delay).

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Financial Stnadards Work group?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Date: Sat, 20 May 2000 23:28:06 -0700
To: ietf@ietf.org
Subject: re: Financial Stnadards Work group?
X9.59 is a financial industry standard for all account-based electronic retail transactions.

In the AADS strawman chip scenerio for X9.59 ... whether debit, credit, prepaid, etc. , the chip would sign a X9.59 transaction and work identical whether it was at person's PC or at point-of-sale (it works the same whether any ietf internet infrastructure is involved or existing financial network infrastructure)

Such an AADS strawman chip scenerio for X9.59 would work the same regardless of internet, no-internet, point-of-sale, debit, credit, pre-paid, bank, subscriber, isp. (the AADS strawman chip scenerio also works the same for non-X9.59 AADS scenerios like AADS radius, ISP authenticated access, webserver authenticated access, VPN authentication operation, etc).

There are some issues for the AADS strawman chip scnerio for X9.59, like contact or contactless. Contact would be standard existing chipcard standard and would be usable in existing chipcard contact readers. The contactless standards are less well accepted ... but establishing a contactless accepted standard would free up the AADS strawman chip to become form-factor agnostic (i.e. an AADS strawman chip could imbedded into almost any shape and be able to operate).

The AADS chip strawman scenerio for X9.59 not only proposes that it is the same regardless of whether it is Internet or non-internet, but also whether it is credit, debit, pre-paid, authenticated access, existing financial infrastructure, point-of-sale, who the bank is, face-to-face physical, who the service provider is, as well as what country that it might operate in

At 08:06 AM 5/16/2000 +0300, Musandu wrote:
I do not quiet agree with the current standards, they are a pain in the neck. E.g ( Just one example ) I want the internet debit card and the devices for charging them to be standard hardware available in any computer store. This will allow one to chose any bank or service provider ( instead of your money going proprietory ): imagine buying a new modem or router every time you change ISPs or buying different kinds of printers for printing from different web sites. That is the position of debit card recharging buying a new device each time you change the service provider. The IETF can help or do you hold alternative views ( give me some recharging devices that allow change overs )??

Yours sincerely,
Nyagudi Musandu

At 10:28 14/05/00 -0700, you wrote:
>Musandu writes
>
> >It may just be time for the IETF to develop a financial standards
> >work group separate from the applications work group. I can even >forsee
>a Simple Cash Transfer Protocol? any objections?
>
>There is an ANSI Financial Standards body (X9) which is also chair of the
>ISO Financial Standards group.
>
>The electronic commerce payments working group (X9A10) has a draft standard
>for all electronic retail payments (debit, credit, pre-paid, electronic
>cash, etc) .. X9.59.
>
>
>misc. ref
>
>http://www.x9.org/
>http://www.x9.org/main_organization.html
>http://www.x9.org/subcomms/x9a/general/public/general.html
>http://www.tc68.org/
>http://www.garlic.com/~lynn/
>http://www.garlic.com/~lynn/99.html#224
>http://www.garlic.com/~lynn/8583flow.htm
>http://www.garlic.com/~lynn/draft-wheeler-ipki-aads-01.txt
>
>& of course my rfc index is also at:
>
>http://www.garlic.com/~lynn/rfcietff.htm
>
>as well as ietf, payments, security, X9F, and financial glossaries
>
>--
>Anne & Lynn Wheeler lynn@garlic.com
> http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

--
Anne & Lynn Wheeler lynn@garlic.com http://www.garlic.com/~lynn/

RISC Reference?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: RISC Reference?
Newsgroups: comp.arch
Date: Sun, 21 May 2000 14:14:32 GMT
eugene@cse.ucsc.edu (Eugene Miya) writes
Just saw Ditzel at the Asilomar meeting. Tredenick was there, too. Nick apepars to be interested in small planes.

how small?, we were out there and saw (denver's) small plane go down ... didn't know what was going on tho until later in the evening when we heard it on the news.

misc. 801 ref;
http://www.garlic.com/~lynn/95.html#5
http://www.garlic.com/~lynn/95.html#11

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

TF-1

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: TF-1
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Mon, 22 May 2000 18:14:54 GMT
"Al Grant" writes:
Fair enough. I was particularly interested in the CPU design though. It predates the release of POWER (1990 IIRC). Were IBM using early POWERs in custom computers or was this something quite different?

RIOS predated POWERPC. RIOS was used in number of things. ROMP predated RIOS (as was targeted for a number of things). I have little plastic case on my desk with six chips embedded in it with title IBM AWD Austin & GTD Burlington, "POWER (aka RIOS) Architecture", 150 million ops, 60 million flops, 7 million transistors.

One thing I consider big difference between ROMP/RIOS & POWERPC ... was POWERPC allowed for cache consistency (aka SMP). all the ROMP/RIOS designs (that I know of) had no provisions for cache consistency operation (ROMP/RIOS would be involved in various parallel machine designs ... in part because they couldn't be used in cache consistency SMP machines ... aka if all you have is a hammer, then everything is a nail?).

random references:
http://www.garlic.com/~lynn/2000.html#49
http://www.garlic.com/~lynn/99.html#129

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

TF-1

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: TF-1
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Mon, 22 May 2000 21:27:21 GMT
pontius@btv.MBI.com.invalid (Dale Pontius) writes:
If there's any value to this reply, it's tying the TF1 to the GF11 - that at least gives you another search point. It's also worth knowing that to the best of my knowledge, both were one-of-a-kind research machines, and probably spend their entire service lifetimes in Yorktown Heights, New York.

I think that some of this was sponsored out of a lab in Kingston that started out with a whole load of FPS boxes (attached to a couple IBM mainframes) ... working on various chemical & atomic calculations, I vaguely remember them announcing along the way various calculation thresholds in the gflops range in the mid to late '80s. Then there were upgrades with FPS boxes in combination with IBM 3090s with vector facility.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

TF-1

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: TF-1
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Mon, 22 May 2000 21:41:08 GMT
a URL for references to both GF11 and RP3
http://www.research.ibm.com/compsci/arch_os/abs.html

with respect to RP3 comment:
http://www.garlic.com/~lynn/99.html#136a

my wife had been assigned the task to review RP3 to decide whether it should continue to receive funding.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

A most delicious (non-folkloric) thought.

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: A most delicious (non-folkloric) thought.
Newsgroups: alt.folklore.computers
Date: Tue, 23 May 2000 18:33:35 GMT
TJ Edmister writes
When I first started hearing stuff about emails containing viruses and causing trouble I knew it must have had something to do with MS. I'm immune since I use old web browsers and things. The only time I ever had a virus was when I got a darn bootsector bug on some 360k disks from a BBS I used to call with an 8086.

i think we first ran into situation where email could contain an executable that might be a virus (or actually a trojan horse) around '71 or '72 (i.e. executable is accepted into the system ... and turn out to have something embedded that would compromise the infrastructure).

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

IBM Linux

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM Linux
Newsgroups: alt.folklore.computers
Date: Wed, 24 May 2000 00:06:37 GMT
jones@cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) writes:
IBM ran a full page add in today's NY Times touting their 390 Mainframes as the ideal Linux server boxen.

Of course, Amdahl ported Unix to the 470 (the Amdahl clone of the 370) back in the 1970's, so running a Unix variant on the current descendant of that architecture is no real surprise, but still, I find the thought of "Big Blue" embracing Linux to be more than a little strange (even though I agree with the strategy).

Doug Jones jones@cs.uiowa.edu


from:
http://www.garlic.com/~lynn/2000b.html#62

posted here a month ago ... from a posting that had been originally made to ibm mainframe group in Feb. of this year ... the number of separate, distinct copies of Linux running simultaneously on a single mainframe.
My test LPAR finally ran out of gas (no resources available) at:

41,400

separate Linux images. Yes, FORTY-ONE THOUSAND WWW servers on a single physical system. The last few hundred were painful as CP was fighting for resources against a LPAR cap, but it did it. I finally ran out of storage at 41K and change.


a LPAR is a physical resource partitioning of the real mainframe into multiple logical partions/machines (i.e. a LPAR ... or logical partition is a subset of the total machine resources).

there were ports of Unix to ibm mainframes prior the gold port (aka amdahl unix, or Au) ... including the telco port to TSS/370 platform and various university ports. There were also non-standard unix ports like the Locus port ... for aix/370.

misc. other URLs
http://www.garlic.com/~lynn/99.html#2
http://www.garlic.com/~lynn/2000.html#64

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Cache coherence [was Re: TF-1]

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Cache coherence [was Re: TF-1]
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Thu, 25 May 2000 12:56:20 GMT
nmm1@cus.cam.ac.uk (Nick Maclaren) writes
The point is that non-coherent SMP hardware is simple to design, cheap to make, and very scalable - in fact, it is nothing more than a distributed data system with global addressing. The (actual but inefficient) implementations of HPF and the (efficient but purported) implementations of OpenMP for distributed memory systems are exactly the same technology, but the with addressing itself in software.

Data coherent SMP has none of those advantages, but is much easier to program for.


funny you should mention that ... the 16-way (in the following reference on 801, circa '76)
http://www.garlic.com/~lynn/95.html#11
http://www.garlic.com/~lynn/98.html#40

was big mainframes crammed into a box w/o cross-cache signaling for consistency. we did some slight of hand with virtual memory and simulated messaging to support a broad range of applications. the business problem was getting people that were accustom to very strong memory consistency to put it out as a standard product.

when my wife & I were doing cluster scaleup for RIOS ... we didn't make that mistake ... but created a couple of other problems. the interconnect fabric we were using ... not only supported processor-to-processor messaging ... but also processor-to-device, so instead of confining ourselves to only doing processor to processor message solutions ... we also looked at using the same fabric in other ways for device interconnect also, misc. ref:
http://www.garlic.com/~lynn/96.html#15

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

IBM 1460

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM 1460
Newsgroups: alt.folklore.computers
Date: Sat, 27 May 2000 06:15:47 GMT
jmaynard@thebrain.conmicro.cx (Jay Maynard) writes
HASP (the Houston Automatic Spooling Program) was written by IBMers at the Manned Spacecraft Center (now the Johnson Space Center), for OS/360 MVT (I don't think it ran on MFT, anyway). I don't know if the SPOOL acronym was invented by those folks, though.

I ran hasp on MFT-11 and MFT-14;

misc. ref:
http://www.garlic.com/~lynn/94.html#18
http://www.garlic.com/~lynn/2000.html#13
http://www.garlic.com/~lynn/2000.html#55
http://www.garlic.com/~lynn/2000.html#76

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

IBM 1460

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM 1460
Newsgroups: alt.folklore.computers
Date: Sat, 27 May 2000 15:47:02 GMT
Nick Spalding writes
Yes, for just the reasons you give. They often had a 1401 alongside and spooled to/from it via tapes.

my first summer programming job was re-implementing the 1401 "MPIO" program (that did the tape<->reader/printer/punch for 709 at school) on a 360/30 (at least the 1401 binary deck that was loaded & performed the function had "MPIO" written in magic marker across the top ... and is what I was informed that I was implementing).

The 360/30 could be run in 1401 emulation mode ... and the original MPIO (multiprogramming input/output?) program could be run w/o needing a port. The source for my 360 assembler implementation ran to about 2500 cards (slightly larger than would fit in a card box ... but still small enuf to fit in a card tray) ... this included both the ability to run "stand-alone" (i.e. my own monitor, interrupt handler, storage allocation, scheduling, i/o supervisor, etc) and under os/pcp-6 (with DCB & get/put macros).

misc. ref:
http://www.garlic.com/~lynn/93.html#15
http://www.garlic.com/~lynn/93.html#17
http://www.garlic.com/~lynn/97.html#21
http://www.garlic.com/~lynn/98.html#9

and for 360 similar (but more generalized UR not specific 70xx front-end)
http://www.garlic.com/~lynn/98.html#15

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Cache coherence [was Re: TF-1]

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Cache coherence [was Re: TF-1]
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Sat, 27 May 2000 16:08:08 GMT
John McCalpin writes
IBM built such a machine in the early 1990's. It was a short-lived project that I think went under the name "PowerParallel", and was available (IIRC) by special order only. The two boxes that I knew of were at Florida State and at Dupont.

The system had 4 POWER CPUs, each with their own "local" memory. A portion of the address space accessed a physically shared memory array in the top of the box. The POWER architecture has a segmented memory addressing scheme that makes this approach very easy to do.


it was oak ... it had a feature where segments could be flagged as cached or not-cached. storage that needed to be consistent was allocated in a segment flagged non/never-cached. an issue was developing programming paradigms that could use non-standard hardware. work was done on using simulated message passing. they needed tweak to the processor (custom chips) even to do that bit (chips were referred to as rios 0.9).

part of the issue was that we could demonstrate 16-way and quick path to 128-way (and above) using standard existing chips & motherboards with interconnect fabric (even demonstrate interconnect fabric on existing workstations in racks ... but some additional manufacturing cost savings by packaging standard mother boards for high-density rack mounting ... racks had to have some cooling characteristics to achieve the high-density packaging of the mother boards).

even tho oak had a lot of similarities with the mid-70s effort with ibm mainframe ... points on the trade-off curves regarding commodity standard parts were different between the mid-70s and late 80s/early 90s (in part, oak was stuck with non-standard chip part and memory bus)

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Gif images: Database or filesystem?

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Gif images: Database or filesystem?
Newsgroups: comp.databases
Date: Sat, 27 May 2000 17:00:08 GMT
"Adam Ruth" writes:
I have to disagree with you. I created a directory on my sever containing 6,000 8k jpg images each in 100 sub-directories (600,000 images total). The time it took to access any one at random was indiscernible from accessing a file where it is alone in the directory. This has to do with 2 things:

1) The file system can cache it's directory and file structure. Accessing a single node can be almost instantaneous.

2) The web server is tuned for maximum bandwidth when accessing files from the file system, such as web pages or images.

A web interface is going to need random access to single files more than it will need to grab 50,000 all at once. If you have files that need to be used through a web interface, it's almost always best to store them in the file system, at least by my experience.

FYI, my testing server is a 433 Celeron Dell Dimension, with 256 MB RAM, running Red Hat Linux 6.1 and Apache 1.3.9.


the issue isn't whether a single file open in a simple structure is slower or faster than a file open in a complex structure. The issue is whether generalized file open/close pathlength for relatively trivial objects is significantly larger than DBMS overhead interface and its access infrastructure overhead (which has tended to pre-open/pre-access disk at database startup).

most often dbms transactions have been compared to batch processing ... where they both (in effect) have had single set of file open/close operations for the whole set of transactions. The web scenerio tends to be transaction oriented ... with file open/close per operation (that pathlength nominally is greater than a dbms single transaction pathlength).

dbms has some additional fixed cost ... both in terms of program setup and ongoing maint. this has tended to be recovered as activity scales up ... including infrastructure overhead for better update&change control & shorter aggregate pathlength for peak/saturated cpu operation.

In any event, there tends to be a cross-over point where the additional upfront complexity of dbms is net benefit to environment.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

thread scheduling and cache coherence traffic

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: thread scheduling and cache coherence traffic
Newsgroups: comp.programming.threads
Date: Mon, 29 May 2000 18:32:07 GMT
Jan Hoogerbrugge writes:
Hi,

I am developing a thread scheduler that runs on a SMP machine (own creating, no silicon, just simulation at the moment, 8-16 processors, 20-40 threads, very frequent thread switching).

I am worried about threads that are moving to fast from processor to processor and causing lots of cache coherence traffic. Does anyone knows literature or techniques on how to prevent this.

I am thinking about one thread queue per processor and processors can steal threads from other processors when all their own threads are blocked for a 'long' time. Questions that I have is how to define long, and which thread to steal.

As an alternative I am thinking about a system with private thread queues and no stealing. A migration thread runs once in a while to migrate threads in order to balance load. This migrator uses load statistics of the threads.

Comments are welcome.

Cheers, Jan -- Jan Hoogerbrugge Philips Research Laboratories


basically VM put in processor affinity for virtual memory in the late '70s to early '80s. Problem wasn't just threads ... but the memory that they used ... i.e. if group of threads had very high clustering on the same memory locations ... then if those threads ran on different processors (even w/affinity) there would be lots of cache-chatter ... thread affinity to a processor cache is one order indirection from the problem ... it is memory cache affinity that is under consideration ... multiple threads with high clustering/locality to the same locations can be actually worse for cache-chatter than thread switching (aka threads sharing same memory as opposed to processes that have private memory).

related discussion ... where lock-out interval (duration that thread might be dedicated to a processor) was selected for processor type based on trade-off benefits of cache locality & cache locality loss.
http://www.garlic.com/~lynn/99.html#98

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Hard disks, one year ago today

From lynn@adcomsys.net Sat Jun 03 21:03:39 2000
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Hard disks, one year ago today
Newsgroups: comp.arch
Date: Tue, 30 May 2000 13:56:01 GMT
"Stephen Fuld" writes:
to produce drives with less than one platter :-) (Actually, it is easy to use less than one platter by short stroking the actuator, but it isn't economical. The cost is the same and you a lower price for it)

there has been work in the past on (large mainframe) offerings with both a full-stroke and a short-stroke actuator ... where they charged more for the short-stroke actuator as an "enhanced performance" feature (the same thing could have been accomplished using full-stroke actuator with judicious data allocation, but few customers were capable of such restraint ... it was easier to pay more for a short-stroke feature).

Hard disks, one year ago today

--

Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/ From lynn@adcomsys.net Sat Jun 03 21:03:42 2000 From: Anne & Lynn Wheeler <lynn@garlic.com> Subject: Re: Hard disks, one year ago today Newsgroups: comp.arch Date: Tue, 30 May 2000 14:36:03 GMT
misc. ref
http://www.garlic.com/~lynn/95.html#8

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

write rings

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: write rings
Newsgroups: alt.sys.pdp10,alt.folklore.computers
Date: Wed, 31 May 2000 14:29:12 GMT
Tom Van Vleck writes
We evolved a theory of crashing, recovery, and salvage that comtemporary operating systems still lack. This margin is too small to describe the whole thing though.

slightly related ... not only with respect to recovery done by humans (system programmers) ... but also with respect to normal system operations and commands issued by humans in general

misc. ref:
http://www.garlic.com/~lynn/99.html#71

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

IBM 1460

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM 1460
Newsgroups: alt.folklore.computers
Date: Wed, 31 May 2000 14:47:36 GMT
nospam@nowhere.com (Steve Myers) writes:
My recollection is no MFT release had a true SQA, though there was storage reserved for some shared control blocks, like the ENQ/DEQ control blocks. Far too many integrity critical control blocks were in the partition, and completely unprotected from applications. Examples. TIOT, TCB (I think), the DEBs. The storage management free space chain was readily available for corruption.

simple thing was that storage protect wasn't turned and so for HASP to take-over the system ... it just saved the system supervisor new PSW & overlaid supervisor new PSW location with a pointer to HASP code. When the HASP code intercept got control ... it was then able to act as supervisor/kernel function. It also was able to create intercept for I/O interrupts.

When storage protection was supported ... it was no longer possible (easy) to just create supervisor/kernel intercept just modifying certain storage locations. System did support a "customer" defined SVC (supervisor call) ... it was possible to build a system with a customer defined/added SVC which did execute with kernel authority. HASP shipped a SVC call that the customer installed into the system library as part of the HASP installed. HASP then executed that SVC at startup ... which validated that it was being called by HASP ... and then did the appropriate things to create the interrupt intercepts.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Hard disks, one year ago today

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Hard disks, one year ago today
Newsgroups: comp.arch
Date: Wed, 31 May 2000 14:51:58 GMT
"Stephen Fuld" writes:
Sure, but drives like the 3380-J and 3390-1 didn't sell very well. And even IBM has realized that it is a losing idea and none of their more recent drives offer this.

it originally was a facetious suggestion (controller microcode change for short stroke actuator so that not all portions of a platter could be accessed ... different than standard support with multiple actuators accessing different portions of the same platter) ... part of assertion that relative system performance of disk infrastructure had degraded by factor of five over 10-15 year period (aka memory/cpu got 50 faster but disks only got 10 faster during the period). for large complex infrastructure the improvement in overall system thruput (as percentage of overall total system value) totally dominanted any loss in value not using all available disk surface.

original report motivated large effort to show it wasn't true ... but detailed evaluations eventually supported the idea as well as other innovative uses of disk technology to improve overall system thruput.

the other activity was activity monitoring (& disk access traces) for 1) load-balance the high-activity stuff across available actuators 2) clustering for large block transfers and 3) recognizing that access patterns (as mentioned) wasn't actually homogeneous and judicious combination of high activity and low activity data allocation across available actuators. many of these infrastructures ran 30-300 actuators.

all of that was different from more recent migration of dedicated "big iron" disk implementations to implementations that could share a lot of commodity volume parts.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

IBM 1460

Refed: **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM 1460
Newsgroups: alt.folklore.computers
Date: Fri, 02 Jun 2000 14:38:10 GMT
jsaum@world.std.com (Jim Saum) writes:
I don't remember HASP's memory requirements, but it tended to be embraced first at large installations because it required a dedicated HASP partition.

misc. ref (posted a couple times a year for the past several years):
http://www.garlic.com/~lynn/99.html#93

& others:
http://www.garlic.com/~lynn/93.html#14
http://www.garlic.com/~lynn/94.html#2
http://www.garlic.com/~lynn/94.html#18

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Cache coherence [was Re: TF-1]

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Cache coherence [was Re: TF-1]
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Fri, 02 Jun 2000 15:24:40 GMT
Greg Pfister writes:
I never heard anybody say 128-way, and I was somewhat in the middle of this. What I saw was that it was always intended as an SMP replacement (yes, SMP, don't ask, some people's heads were in a strange place then). The software bill, not the hardware, was always the sticking point. Anyway, the SP became by definition the "right" solution, and Live Oak was not resurrected again.

you weren't at the following meeting:
http://www.garlic.com/~lynn/95.html#13

yes it was live oak ... jsut finger abbreviation.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Cache coherence [was Re: TF-1]

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Cache coherence [was Re: TF-1]
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Date: Fri, 02 Jun 2000 15:42:47 GMT
Anne & Lynn Wheeler writes:
you weren't at the following meeting:

http://www.garlic.com/~lynn/95.html#13


a couple months earlier (than above mentioned meeting) ... there were demos/presentations of the "<4" (high) rack-mount motherboard housing with pair of fiber-channnel connectors and special cooling channels built into the rack that provided cooling to the motherboards (cool air from the rack cooling channels in one side of the motherboard housing, across the motherboard and out the otherside to return path cooling channel built into the otherside of the rack).

Fabric interconnect was based on cascaded ancor 64way non-blocking switch (replicated fabric infrastructure to the pair of fiber-channel connectors on each motherboard). Relatively few racks would house 128 processors with associated interconnect switches and associated disk drives.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

optimal cpu : mem <-> 9:2 ?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: optimal cpu : mem <-> 9:2 ?
Newsgroups: comp.arch
Date: Sat, 03 Jun 2000 21:13:04 GMT
"Bill Todd" writes
A possibly naive analysis would suggest that any memory speed less than the processor speed is sub-optimal, in an approximately continuous 'desirability' function lacking any conspicuous threshold points (e.g., 9:1).

caching, deep pipelines, asynchronous execution, out of order execution, etc ... could all be considered toolkit suite for masking memory latencies. The more you can mask memory latencies ... the more you can tolerate memory latencies (up to totally saturating memory bandwidth) there are also application sensitivities to the degree that various memory latency masking techniques are effective.

turns out for system thruput ... something similar might be stated for disk access latencies ... a side drift in the "hard disks" thread

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Hard disks, one year ago today

Refed: **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Hard disks, one year ago today
Newsgroups: comp.arch
Date: Sat, 03 Jun 2000 21:17:23 GMT
Bernd Paysan writes:
The best strategy is probably having redundand hard disks (e.g. RAID 5) to be save against hardware failure, and a log-structured filesystem to take care of software failure (rotten files). But most of the time, hard

part of discussion a couple months ago on thinking twice about log structured filesystems
http://www.garlic.com/~lynn/2000.html#93

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Hard disks, one year ago today

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Hard disks, one year ago today
Newsgroups: comp.arch
Date: Sun, 04 Jun 2000 17:13:14 GMT
Edward Wolfgram writes
PC users recoil at the thought that in order to back up data reliably they may need to buy an inconceivably expensive $50,000 tape drive, and rightly so. A device that makes eminent sense in a large mainframe shop shared by thousands of

a large percentage of PCs (desktops & laptops) are corporate property, connected to corporate networks and frequently containing valuable corporate owned information. while corporations may not buy $50,000 drives for every PC (although some PCs might, in fact, be repositories for data justifying such expense) ... they may make policies regarding backup of data ... whether it is locally attached devices or with network backup (which may ultimately involve a large mainframe and expensive tape drives).

To some extent the degree of backup sophistication is proportional to the value of the data ... one value factor may be the number of users sharing it ... but there are also instances of very valuable unique data residing on single PC/workstations (justifying advanced backup technology).

There was some statistic published that 50% of the companies that had a disk crash w/o backup went backrupt within a month after the crash (i.e. typically this includes small-to-medium PC-based businesses .. with things like computerized invoices & billing operations where the information wasn't replicated anywhere else; loosing a month or more of cash flow can be very debilitating).

home/personal use machines (using the same hardware) are less likely to contain unique data that might have significant value. The justified backup costs is not necessarily proportional to the cost of the PC hardware ... but proportional to the value of the data that could be lost.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

The first "internet" companies?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The first "internet" companies?
Newsgroups: alt.folklore.computers
Date: Mon, 05 Jun 2000 17:08:49 GMT
Chris Baird writes
A friend asked me yesterday who the "first" Internet company would have been, in the context of a commercial organisation specifically created to supply data over the modern Internet (and not primarily as an access provider like UUNET), and I had to answer that to my best immediate recollection that would have been Clari.Net from Brad Templeton & co. (I'll consider UUCP networking as the practical origin of the Net as we know it today.)

From another perspective, there were various companies & consoritums that bid on NSFNET backbone (&/or were involved in regional networks that connected to the backbone) ... a spin-off of the Merrit, IBM, MCI, et. al that operated the NSFNET backbone was ANS ... Advanced Network & Services, Inc. It was initially non-profit but then split into a profit side and a non-profit side.

MCI also formed a number of organizations that were directed at providing internet related-services (one of them was the first involved with Mosiac ... aka Netscape in something that would be referred to today as electronic commerce server).

misc. organizations that had acceptable use policies


ans.policy
barrnet.policy
cerfnet.policy
cicnet.policy
cren.policy
farnet.policy
fricc.policy
jvnc.policy
los-nettos.policy
michnet.policy
nearnet.policy
northwestnet.policy
nsfnet.policy
nysernet.policy
oarnet.policy
onet.policy
prepnet.policy
uninet.policy

actual text of some of the policies

ACCEPTABLE USE POLICY
of
Advanced Network & Services, Inc.

Preamble.

Advanced Network & Services, Inc. ("ANS") is a
not-for-profit corporation dedicated to the advancement of education
and research in the interest of improving competitiveness and
productivity in the global economic environment.  Accordingly, ANS'
objectives are to help expand access toand interchange of information
technology resources among academic, government and industry users,
provide state-of-the-art high speed data networks and related
services, engage in related research and development work, and improve
the ways that information is created and used for education and
research purposes.  ANS aims to support the academic and research
communities, enhance education and research at all levels, and
contribute to improving the quality of education and research.

NYSERNet, Inc.
ACCEPTABLE USE POLICY

NYSERNet, Inc. recognizes as acceptable all forms of data
communications across its network, except where federal subsidy of
connections may require limitations.  In such cases use of the
network should adhere to the general principle of advancing
research and education through interexchange of information among
research and educational institutions in New York State.

In cases where data communications are addressed to recipients
outside of the NYSERNet regional network and are carried across
other regional networks or the Internet, NYSERNet users are advised
that acceptable use policies of those other networks apply and may,
in fact, limit use.

The President of NYSERNet, Inc. and his designees may at any time
make determinations that particular uses are or are not consistent
with the purposes of NYSERNet, Inc. which determinations will be
binding on NYSERNet users.

CERFnet - ACCEPTABLE USE POLICY

Purpose of CERFnet

The purpose of the California Education and Research Federation is
to advance research and education in general by assisting in the
interchange of information among research and educational
institutions by means of high speed data communications and related
telecommunications techniques.

NORTHWESTNET ACCEPTABLE USE POLICY

NorthWestNet is a regional data communications network serving a
consortium of universities and research groups in the northwest-
ern part of the United States.  Its goals are summarized in the
Articles of Incorporation for the Northwest Academic Computing
Consortium, Inc.  All use of NorthWestNet facilities must be
consistent with the goals and purposes of NorthWestNet.  The
intent of this statement is to describe certain uses which are
consistent with the purposes of NorthWestNet, not to exhaustively
enumerate all such possible uses.

Los Nettos Acceptable Use Guidelines
        ------------------------------------

A member may send any type of data over the Los Nettos network.

If data from any source leaves Los Nettos and enters another network
that data must follow the acceptable use rules of the entered network
(including member networks, regional, or backbone networks).  It is the
responsibility of the member where this traffic enters Los Nettos to
meet this requirement.

Any traffic which is disruptive from any source is prohibited.

NEARnet - ACCEPTABLE USE POLICY

This statement represents a guide to the acceptable use of NEARnet for data
communications.  It is only intended to address the issue of NEARnet use.  In
those cases where data communications are carried across other regional
networks or the Internet, NEARnet users are advised that acceptable use
policies of those other networks apply and may limit use.

NEARnet member organizations are expected to inform their users of both the
NEARnet and the NSFnet acceptable use policies.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

The first "internet" companies?

Refed: **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The first "internet" companies?
Newsgroups: alt.folklore.computers
Date: Mon, 05 Jun 2000 19:03:12 GMT
"David E. Fox" writes
What OSes (if any) would have been better suited ca. 1970? Multics, maybe. IBM 360 OS? One wonders.

note the internal (360-based) corporate network was larger than the arpanet/internet from just about the beginning until sometime around mid-80s (change in large part because of the introduction of workstation & pc based tcp/ip nodes).

misc. refs:
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/99.html#39
http://www.garlic.com/~lynn/99.html#112
http://www.garlic.com/~lynn/99.html#113
http://www.garlic.com/~lynn/2000.html#74
http://www.garlic.com/~lynn/internet.htm

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

The first "internet" companies?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The first "internet" companies?
Newsgroups: alt.folklore.computers
Date: Mon, 05 Jun 2000 19:11:27 GMT
Anne & Lynn Wheeler writes:
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/99.html#39
http://www.garlic.com/~lynn/99.html#112
http://www.garlic.com/~lynn/99.html#113
http://www.garlic.com/~lynn/2000.html#74
http://www.garlic.com/~lynn/internet.htm


oops ... that needs a ~lynn
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/99.html#39
http://www.garlic.com/~lynn/99.html#112
http://www.garlic.com/~lynn/99.html#113
http://www.garlic.com/~lynn/2000.html#74
http://www.garlic.com/~lynn/internet.htm

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

The first "internet" companies?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The first "internet" companies?
Newsgroups: alt.folklore.computers
Date: Mon, 05 Jun 2000 23:23:32 GMT
Jim Thomas writes
But the original question had "" around "internet". Does that allow earlier RJE services to qualify?

the internal corporate network was primarily email, file transfer & remote terminal simulation for online interactive users (on CP, VM, CMS, etc) ... very little RJE & (JES2) NJE/NJI.

misc. ref:
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/99.html#39
http://www.garlic.com/~lynn/99.html#112
http://www.garlic.com/~lynn/99.html#113
http://www.garlic.com/~lynn/2000.html#74
http://www.garlic.com/~lynn/internet.htm

The internal corporate network exceeded 2000 hosts about the same time the "internet" exceeded 1000 hosts ... but the internet saw very rapid growth in the '84 to '87 timeframe.

also from
http://www.pbs.org/internet/timeline/

1974 - 1981

The general public gets its first vague hint of how networked computers can be used in daily life as the commercial version of the ARPANET goes online. The ARPANET starts to move away from its military/research roots.

1974 - Bolt, Beranek & Newman opens Telenet, the first commercial version of the ARPANET.

1976 - Queen Elizabeth goes online with the first royal email message.

1979 - Tom Truscott and Jim Ellis, two grad students at Duke University, and Steve Bellovin at the University of North Carolina establish the first USENET newsgroups. Users from all over the world join these discussion groups to talk about the net, politics, religion and thousands of other subjects.

1981 - ARPANET has 213 hosts. A new host is added approximately once every 20 days.

1982 - 1987

Bob Kahn and Vint Cerf are key members of a team which creates TCP/IP, the common language of all Internet computers. For the first time the loose collection of networks which made up the ARPANET is seen as an "internet", and the Internet as we know it today is born. The mid-80s marks a boom in the personal computer and super-minicomputer industries. The combination of inexpensive desktop machines and powerful, network-ready servers allows many companies to join the Internet for the first time. Corporations begin to use the Internet to communicate with each other and with their customers.

1982 - The term "Internet" is used for the first time.

1984 - William Gibson coins the term "cyberspace" in his novel "Neuromancer." The number of Internet hosts exceeds 1,000.

1986 - Case Western Reserve University in Cleveland, Ohio creates the first "Freenet" for the Society for Public Access Computing.

1987 - The number of Internet hosts exceeds 10,000.

--
Anne & Lynn Wheeler | lynn@garlic.com
http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

internal corporate network, misc.

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: internal corporate network, misc.
Newsgroups: alt.folklore.computers
Date: Tue, 06 Jun 2000 01:16:48 GMT
Jim Thomas writes
But the original question had "" around "internet". Does that allow earlier RJE services to qualify?

the interactive online work, virtual machines, the internal network, as well as GML (precursor to SGML, HTML, etc) and other stuff went on at 545 tech. sq (mostly floors 2 & 4, same building as multics). Both groups (corporate stuff & multics) had people that had worked on CTSS.

One of the applications that was developed on this platform was HONE (for Hands-On Network Environment) that provided online support mostly to salesman and customer support ("field") people.

In 1977, the various US HONE sites were consolicated to Palo Alto onto eight SMP processors (network id, NONE1, HONE2, ..., HONE8) and a large disk farm. At that time of the consolidation, Palo Alto HONE supported something like 40,000 people (total accounts, not logged on simultaneously). One of the major applications (besides email, document preperation, word processing, GML document printing, etc) was called configurator. Starting with the 370/125 (in the early '70s), it was no longer possible to order a processor straight from the sales manual w/o the salesman running the order thru the configurator so that all feature codes were specified correctly (configurator also could supply lot of boiler plate for customer contract).

There were other HONE sites in europe, canada, japan, etc (I did initial hone installs in Europe and Japan in the early '70s). HONE in Palo Alto was for US support.

The Palo ALto complex also supported a large terminal and network front-end that included single system image and load balancing (i.e. if processor complex went down, things were automatically configured and login was routed to available processors, email and network activity had a lot of transparency).

The Palo Alto HONE complex was then replicated in Dallas (hone20, hone21, hone22, etc) to handle things like disastrous earthquake in Cal. (sites operated concurrently but either could "fall-over" to the other). Later this was extended to three sites: Palo Alto, Dallas, and Boulder.

misc. refs:
http://www.garlic.com/~lynn/94.html#47
http://www.garlic.com/~lynn/95.html#3
http://www.garlic.com/~lynn/96.html#23
http://www.garlic.com/~lynn/97.html#4
http://www.garlic.com/~lynn/98.html#16
http://www.garlic.com/~lynn/98.html#23
http://www.garlic.com/~lynn/99.html#38
http://www.garlic.com/~lynn/99.html#149
http://www.garlic.com/~lynn/99.html#150
http://www.garlic.com/~lynn/2000.html#1
http://www.garlic.com/~lynn/2000.html#8
http://www.garlic.com/~lynn/2000.html#75
http://www.garlic.com/~lynn/2000.html#82

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

The first "internet" companies?

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: The first "internet" companies?
Newsgroups: alt.folklore.computers
Date: Tue, 06 Jun 2000 15:19:59 GMT
Anne & Lynn Wheeler writes:
note the internal (360-based) corporate network was larger than the arpanet/internet from just about the beginning until sometime around mid-80s (change in large part because of the introduction of workstation & pc based tcp/ip nodes).

series of (online) status RFCs from the 71-73 period listing arpanet hosts:
http://tools.ietf.org/html/rfc252.txt
http://tools.ietf.org/html/rfc266.txt
http://tools.ietf.org/html/rfc267.txt
http://tools.ietf.org/html/rfc287.txt
http://tools.ietf.org/html/rfc293.txt
http://tools.ietf.org/html/rfc319.txt
http://tools.ietf.org/html/rfc326.txt
http://tools.ietf.org/html/rfc330.txt
http://tools.ietf.org/html/rfc332.txt
http://tools.ietf.org/html/rfc376.txt
http://tools.ietf.org/html/rfc597.txt

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Request for review of "secure" storage scheme

Refed: **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Request for review of "secure" storage scheme
Newsgroups: sci.crypt
Date: Wed, 07 Jun 2000 16:24:37 GMT
Baruch Even writes:
A simpler method could be used in my opinion.

Most probably the user has a userid and password, and I assume so for this scheme.

It should be noted that when you deal with credit card numbers and any other sensitive infomation you should be carrying this steps in SSL/TLS (i.e. encrypted by the browser), you should further note that you can mark cookies to be sent ONLY over encrypted channels and for a cookie that carries sensitive informations this should be used.


note on SSL alert for IE:
http://www.cert.org/advisories/CA-2000-10.html

some misc. discussion excerpted from financial standards retail payments mailing list (merchant comfort certificates):
http://www.garlic.com/~lynn/aepay4.htm

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

What level of computer is needed for a computer to Love?

Refed: **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: What level of computer is needed for a computer to Love?
Newsgroups: alt.folklore.computers
Date: Wed, 07 Jun 2000 19:11:41 GMT
glass2 writes:
Oh, but that's where all of the fun is! :) I can't count the number of times that I've been 'ghosted' by an ill behaved channel program on a VM system. And, who couldn't love those

DMKUSO361E LOGOFF/FORCE pending for user ########


I fixed that when I rewrote serialization in the early '70s to eliminate all instances of hung/zombies. There was then an APAR to DMKDSP (something PTF13xxx) that unfixed it and re-introduced hung/zombies.

One of the things I did was to go thru all pending operations and re-assign them to the "SYSTEM".

I then did further cleanup when I was fixing things for the disk engineering lab and stuck in missing interrupt handler ... and I/O recovery code (on 370 i/o doing short HDV/CLRIO loop .. which clear both the channel UCW, controller and device, except for something like contingent connection on error).

For malfunctioning controllers ... there was also convention that if you hit every subchannel address on a controller in tight loop with HDV/CLRIO ... the controller would IMPL (re-boot).

misc. ref:
http://www.garlic.com/~lynn/93.html#0
http://www.garlic.com/~lynn/94.html#2
http://www.garlic.com/~lynn/95.html#1
http://www.garlic.com/~lynn/97.html#15
http://www.garlic.com/~lynn/99.html#198

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

What level of computer is needed for a computer to Love?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: What level of computer is needed for a computer to Love?
Newsgroups: alt.folklore.computers
Date: Thu, 08 Jun 2000 14:43:56 GMT
ab528@FreeNet.Carleton.CA (Heinz W. Wiggeshoff) writes:
It's been 26 years since I played with EXCP, (MVT, 3330s with RPS), but in my humble opinion the fun seemed to go out of that level of work when VM and MVS (of necessity) grabbed the given CCWs and 'had their way' with them.

CP/67 ran MVT (and other things) in virtual machines with paged virtual memory. The I/O channels on the 360s ran in real (address) mode. To simulate virtual machine I/O, a module in CP/67, CCWTRANS created a copy of the virtual machine's CCWs, substituting real addresses for the virtual address (and pinning the associated virtual machine pages).

A typical disk EXCP (svc 0) CCW string would be taken by the OS supervisor and prefixed with seek, set filemask, tic ... and then a SIO would be issued pointing to the supervisor's seek. The (supervisor's) seek command would do the arm/head positioning, the set filemask would limit the applicatin's program ability to reposition the arm/head, and the tic would branch to the application program's CCW string (as specified by the EXCP). The typical disk EXCP would then be a seek, search, tic -8, read/write. The seek would be repeat of the supervior's arm/head position command, the search would do a compare on the track/cylinder for the record desired, the tic -8 would repeat the search command, and then there would be the data transfer. The search command could either be a single or multitrack search. It would a compare to see if the record currently under the head met the application criteria, if not it would "branch" to the following CCW (a tic which would branch back to the search command), if the compare was succesful, the search would "branch" to the CCW after the tic. If the search reached end-of-track (or end-of-cylinder) w/o a succesful compare, the CCW program would terminate abnormally.

I have some recollection of being in POK 705 3rd shift in the early '70s where Don Ludlow(?) was cobbling together/testing a version of MVT & (CP/67's) CCWTRANS for AOS aka SVS (precursor to MVS) to run on 370s.

SVS was single virtual storage ... basically MVT laid out in a single 16mbyte virtual memory (with supervisor in the first 8mbyte of virtual memory, andthe 2nd 8mbytes used for all application programs). MVS .. multiple virtual storage ... reworked that so that there could be a separate (16mbyte) address space for each application (although the supervisor continued to be shared in common as the first 8mbyte of each address apace).

performance issue with CKD disks (even w/RPS)
http://www.garlic.com/~lynn/94.html#35

misc. other ref:
http://www.garlic.com/~lynn/93.html#18
http://www.garlic.com/~lynn/94.html#4
http://www.garlic.com/~lynn/94.html#7
http://www.garlic.com/~lynn/94.html#20
http://www.garlic.com/~lynn/94.html#49
http://www.garlic.com/~lynn/95.html#2
http://www.garlic.com/~lynn/97.html#23
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/98.html#11
http://www.garlic.com/~lynn/98.html#12
http://www.garlic.com/~lynn/98.html#28
http://www.garlic.com/~lynn/99.html#7
http://www.garlic.com/~lynn/99.html@204
http://www.garlic.com/~lynn/2000.html#68

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

What level of computer is needed for a computer to Love?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: What level of computer is needed for a computer to Love?
Newsgroups: alt.folklore.computers
Date: Thu, 08 Jun 2000 16:27:46 GMT
jmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
This may have been true of the original MVS, but by 3.8, the common area in low core was a couple of meg at most (users' regions started somewhere around X'180000', depending on lots of things).

The user's region ran from there upwards for 8 to 10 MB, depending on lots more things (most notable, what got stuck in LPA). Tweaking the size of that private region got to be a full-time job for shops with big CICS regions...

BTW, one thing we've found in playing with MVT 21.8 on Hercules is that, while MVT itself runs fine in systems with less than 16 MB of real storage (or VM-supplied virtual storage, I suspect; IEAIPL00 loops if 16 MB is present), TSO breaks badly if the system has more than 8 MB real. I don't think anyone's gone hunting that particular bug yet.


my other favorite ... was the guys doing the page replacement algorithm for SVS/MVS insisted that they should select non-changed pages before changed pages (regardless of how much you attempted to object to the idea) ... their thot process was that not having to write out a page was better performance optimization.

However, this really hosed the implicit LRU-nature of the overall page replacement concept. It wasn't until way into MVS releases that they finally realized that (high-use) LPA (shared, R/O, program pages commonly used by all applications) were being selected for replacement before private, modified, application-specific (changed) data pages.

"Common" was a big problem and kept getting bigger and bigger (CICS, JES, etc). cross-memory services (special multi-address space hardware instructions, i think initially seen on 3033s) was start that allowed subsystems (like JES) to access data in application memory locations w/o having to actually reside in the same address space.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Interdata, Perkin-Elmer, et al.

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Interdata, Perkin-Elmer, et al.
Newsgroups: alt.folklore.computers
Date: Thu, 08 Jun 2000 16:37:31 GMT
Will Jennings writes:
OK, a brief history of Interdata, etc.; Interdata was founded in about 1967 in Oceanport, NJ, and the majority of the funding was put up by the local jockey club because they wanted

we started with interdata/3 in late '68 or early '69 to implement a replacement for the 360 2702 control unit ... wrote software for the interdata/3 and built a channel attached board ... to connect the interdata/3 to the 360 channel (somewhere this is documented as originating the 360 "plugged compatible manufactures" (PCM) control unit business.

Later this was enhanced to be serveral Interdata/3s in the same box with a Interdata/4 (effectively interdata/3s dedicated to line-scanner functions and the overall control moved to the interdata/4).

Within the past five years or so ... I had a chance to visit a machine room where there was a large perkin-elmer box still being used in this mode.

Also had a chance to talk to somebody that had been installing Perkin-Elmer boxes at some NASA installation in the early '80 ... and his comment was that the channel attachment board was still wire-wrap and could very well have been the same design/implementation that we had done in the '60s.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Interdata, Perkin-Elmer, et al.

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Interdata, Perkin-Elmer, et al.
Newsgroups: alt.folklore.computers
Date: Sun, 18 Jun 2000 03:56:46 GMT
other misc. references to early interdata
http://www.si.edu/resource/tours/comphist/vc1.html
http://web.archive.org/web/19970503010621/http://www.si.edu/resource/tours/comphist/vc1.html
http://www.rwic.und.edu/~schueler/academics/AtSc370/370-l3.htm
http://web.archive.org/web/20000823134627/http://www.rwic.und.edu/~schueler/academics/AtSc370/370-l3.htm
http://www.komkon.org/fms/comp/misc/List.txt
http://www.ccur.com/corporate/history.html

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Thu, 22 Jun 2000 21:45:15 GMT
"Simon Bowring" <sbowring+nospam@mpc-data.co.uk> writes:
1. A very high level of fault tolerance and very low down-time.

close to 10 years ago i remember something about mainframe memory have 64/80 ecc (detect 16 bit errors and correct 15 bit errors) and there was work looking at reed-solomon error correcting codes. lot of current PC memory has fake parity ... although on some machines you can get 8/10 ecc (detect 2 bit errors and correct single bit errors).

in the long distant past there was some documentation on distinction between calling something 195/370 (even if it wasn't quite all of 370) vis-a-vis 195/360 ... the distinction was the "370" had a lot more instruction retry for soft errors ... supposedly going from something like a couple hrs mean time between soft error failure (given the total number of components in a large 195 & the failure rate per component) to weeks or months mean time between soft error failure.

there are also service related issues ... like discussed in mainframe thread
http://www.garlic.com/~lynn/99.html#137

where every error on every machine is logged and evaluated. The reference in the thread was a particular scenerio involving huge concern about there being 15 total errors (of a particularly kind) over a 12 month period across several thousand installed machines ... not per machine over 12 month period .. but 15 total aggregate errors for all machines in 12 month period (many non-mainframe don't even bother to collect every error that has occured on every machine built).

misc. references to prior "mainframe" threads here in alt.folklore.computers over the past 5-6 years:
http://www.garlic.com/~lynn/subpubkey.html#mainframe

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key
http://www.garlic.com/~lynn/

WHAT IS A MAINFRAME???

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: WHAT IS A MAINFRAME???
Newsgroups: alt.folklore.computers
Date: Wed, 21 Jun 2000 18:17:57 GMT
Steve O'Hara-Smith writes:
Ah, that sounds good. It is a mainframe if it needs a specially built room all to itself.

when I was in school we had a 709 (something like serial number 1, 2, or 3, pretty sure <5) ... lots & lots of tubes ... and a room that had a 20ton rated air conditioner.

we tried to interest ibm in it for a museum ... but finally sold it for scrap. guy that bought it, installed it in a barn and placed larger blower fans at the barn doors ... and would operate it when it when outside temp. was cool enuf.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Domainatrix - the final word

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Domainatrix - the final word
Newsgroups: comp.arch
Date: Thu, 22 Jun 2000 22:03:32 GMT
"David Mitchell" writes:
Amen to that,

There are a number of reasons why OS'es are generally not written in assembler any more: 1) It's fcking difficult. Difficult to do, and much harder to debug. 2) The OS is rarely the bottleneck (Windoze excluded ;-). 3) Use of a HLL allows you to use techniques which most assembly language programmers would balk at because of the difficulty of coding them, and in general most of the performance improvement in any given algorithm is achieved through the use of a better algorithm, rather than code optimisation. 4) As has already been pointed out, most good compilers are as good as a competent (sometimes excellent) assembly language programmer.


while i've claimed that one of the major internet risk problems has been due to buffer overruns the majority of which are directly or indirectly due to the C programming paradigm of implicit string lengths ... probably the single largest cause of assembler bugs that I've had to deal with have been some sort of register mis-use ... i.e. either the equivalent of uninitialized variable problem (especially for address registers) or multiple code threads that join ... and not all code threads consistently leaving expected values in registers ... automating register management is a definite quality improvement.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Domainatrix - the final word

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Domainatrix - the final word
Newsgroups: comp.arch
Date: Thu, 22 Jun 2000 22:17:24 GMT
"Al Grant" writes:
IBM's mainframe operating system VM/CMS was written in assembler and even comes with source. Some of it is rather elegant (have a look at the

for an extremely early demo of REX(X) capability I wanted to re-implement the VM/CMS kernel debug tool (something like 60k bytes of 370 assembler ... maybe 15k-20k instructions) in REX(X). At the time, the VM/CP kernel was around 250+ assembler programs and approx. aggregate total of 275k assembler instructions.

The goal of the debug re-implementation was to do it in under 6weeks of my time and have it run 10 faster and have 5-10 more function. In approximately 4weeks of my time I had a REX(X) re-implementation of the VM/CMS kernel debug tool that had 2 the function and ran 10 faster than the assembler version. The next couple months, I spent a day or two off & on writing pattern analysis (in REXX) for VM/CP kernel storage abend dumps (i.e. analysing & looking for patterns of kernel failures). These kernel failure pattern analysis applications ... didn't run 10 faster than the original tool ... since they provided significantly more function.

Part of the pattern analysis was an additional set of PLI programs that analyzed VM kernel assembler listings for program code flow looking for possible register assignment problems as well as things like dead code.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Domainatrix - the final word

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Domainatrix - the final word
Newsgroups: comp.arch
Date: Fri, 23 Jun 2000 03:12:14 GMT
jonathan@DSG.Stanford.EDU (Jonathan Stone) writes:
CMS was originally capable of running on bare 360s, though admittedly later in life it became dependent on "assist" calls into VM/370. (I'm sure someone can fill in details on when, though it probably goes back to the CP/40 at Cambridge(?) or CP/67.)

when i was undergraduate ... i did lot of CP/67 pathlength for running virtual OS MFT & MVT ... a reference to some of the work:
http://www.garlic.com/~lynn/99.html#93

That work had little or no effect on CMS thruput. For CMS I did a hack on making the simulated CMS virtual disk I/O "synchronous" rather than "asynchronous" ... discussed at:
http://www.garlic.com/~lynn/99.html#95

that showed up in CP/67-CMS release 3.1 ... but done as "diagnose" I/O for reasons discussed in the above reference. CMS still had a "switch" and would test for running on a real machine or a "virtual" machine ... and based on the switch would use diagnose I/O or SIO. In the migration of CMS for VM/370 release ... the ability to execute real disk SIO was removed (for non-virtual/real machine operation).

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Any Series/1 fans?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Any Series/1 fans?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 02:49:24 GMT
"George R. Gonzalez" writes:
Any Series/1 fans?

The only comment I've read about them was on the Internet somewhere, where somebody complained about the user-hostile OS.


misc. s/1 discussions
http://www.garlic.com/~lynn/99.html#63
http://www.garlic.com/~lynn/99.html#66
http://www.garlic.com/~lynn/99.html#67
http://www.garlic.com/~lynn/99.html#69
http://www.garlic.com/~lynn/99.html#79
http://www.garlic.com/~lynn/2000.html#64
http://www.garlic.com/~lynn/2000.html#71
http://www.garlic.com/~lynn/2000b.html#29
http://www.garlic.com/~lynn/2000b.html#66
http://www.garlic.com/~lynn/2000b.html#87

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

WHAT IS A MAINFRAME???

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: WHAT IS A MAINFRAME???
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 15:02:26 GMT
optcamel@ix.netcom.com (Howard and Kelly Lute) writes:
Date Check...??? 1976?! Amdahl anything?

Amdahl had success selling in the university & MTS (michigan terminal system) market.

In spring of '76 there was a great deal of consternation created when one of the large financial institutions in Hartford decided to replace one its many existing mainframes with an Amdahl (i believe it was consisered to be the first incursion at a "true-blue" customer). I don't think it was even a technical decision ... there was something going around about the customer being truely miffed by something the local branch manager had said or done.

I got involved when somebody dreamed up the idea that the resource manager (first charged for "kernel" add-on piece of software, up until then there were charges for application software like compilers ... but the resource manager was the first kernel software to have a price-tag ... at $999/month license)) might not run as well on an Amdahl machine.

Since the resource manager replaced existing kernel code with truely dynamic adaptive stuff ... it was hard to make the case that it faired better or worse on any hardware.

An example was the unmodified, base kernel had a table of valid processor identifiers that was used at boot time to adjust various operating system parameters. The resource manager replaced the table with some code that timed sequences of instructions ... and operated based on the observed results.


AMH=AMDAHL        70-10           AMDAHL CORP. STARTS BUSINESS
AMH V/6           75-04?75-06 02  FIRST AMDAHL MACHINE, FIRST  PCM CPU
AMH V6-2          76-10 77-09 11  (1.05-1.15)V6 WITH 32K BUFFER
IBM 3033          77-03 78-03 12  VERY LARGE S/370+EF INSTRUCTIONS
AMH V7            77-03 78-09 18  AMDAHL RESP. TO 3033 (1.5-1.7) V6

... PCM -- plug compatible machine

I remember a seminar that Gene gave at MIT circa '73 or so. He was roundly bashed by a lot of the audience for where he was getting a lot of his funding & manufacturing.

misc. ref:
http://www.garlic.com/~lynn/99.html#2
http://www.garlic.com/~lynn/99.html#188
http://www.garlic.com/~lynn/99.html#190
http://www.garlic.com/~lynn/99.html#191

There was another down=s9de to the dynamic nature ... that it could stick around for years and years as new machines were being introduced (automagically doing all its dynamic adaptive stuff). misc. ref.
http://www.garlic.com/~lynn/95.html#14

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 15:37:27 GMT
kragen@dnaco.net (Kragen Sitaker) writes:
So now my question is: how many users could a 1970s mainframe reasonably support with TSO? More than 200? How about a 1980s mainframe?

in the case of something like CICS & IMS (light-weight sub-monitor) it was pssible to have something like 30,000-50,000 connected terminal users in the early '80s. This put strains on other parts of the system, like if system ever crashed & rebooted (say a major power outage). The SNA session setup code for terminal connection was a large monster. Having 30,000 people/terminals trying to connect simultaneously would drive SNA session setup into page thrashing on most machines. I think at the 20,000 terminal number the (simultaneou reconnect) elapsed time was out around 90 minutes (for really large machines, with really large real memories ... at least for mid '80s).

this turned out to a problem for IMS hot-standby since even tho the dbms was replicated in case of failure & was instantly took-over, terminal session re-establishment would take (relatively) forever in large configurations.

misc. refs:
http://www.garlic.com/~lynn/95.html#13
http://www.garlic.com/~lynn/98.html#35a
http://www.garlic.com/~lynn/98.html#40
http://www.garlic.com/~lynn/99.html#71

part of the following refs was targeted at maintain session state replication that was critical for infrastructures like ims hot-standby
http://www.garlic.com/~lynn/99.html#67
http://www.garlic.com/~lynn/99.html#70

in the case of VM/CMS, CMS users tend to be pretty heavy weight since they are both an address space & thread (as well as the type of work performed).

there is the 68/83 comparision that I've posted here several times, from:
http://www.garlic.com/~lynn/93.html#31

which basically showed that between 68 & 83 the processer and memory capacity increased by factor of 50-60 times ... but the number of concurrent CMS users typically only increased by a factor of four times. the basic conclusion was that typical disk farm thruput between 68 & 83 only increased by a factor of four ... which was the correlation factor with the number of concurrent users. It was necessary to start changing disk i/o paradigms in order compensate for the relatively different rates of change in the different technologies.

other large complex vm/cms configurations:
http://www.garlic.com/~lynn/2000c.html#30
http://www.garlic.com/~lynn/2000c.html#31

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 17:51:24 GMT
cbh@REMOVE_THIS.teabag.demon.co.uk (Chris Hedley) writes:
Hmm, I still wonder why Philips went from Vista to Profs for their email/diary/noticeboard system... Vista was a nice low-load package that ran under MVS, Profs was a high-load package that needed a separate VM for every user; IMHO Vista was also the better system, being much more tightly integrated, easier to use and much, much better with system resources.

Chris.


the core of PROFS was VMSG ... with a lot of stuff ... like the PFKEY converntion and misc. other stuff that didn't perform very well ... wrapped around it).

the source code that the PROFS group used for email was VMSG version 0.9 (effectively a test version before general release ... although in this case general release was internal corporate ... not for "customers" ... but since the internal network at the time was larger than the arpanet/internet ... still a reasonably large population ... and it was nearly all VM/CMS).

there was actually a dispute with the PROFS group where they picked up the assembler source code ... claiming it wasn't VMSG. However, it turned out that the primary author of VMSG had placed his initials in an administrative field on every piece of email handled. His initials could be found in every email originated by VMSG and every email originated by PROFS (including those in customer shops anywhere in the world). My small contribution to VMSG was a little of the CC & mailing list code; at one point I kept a small nickname file with 25,000 or so names ... before we did the corporate telephone book stuff (there was an incident where i accidently invoked the whole nickname file).

Another thing that was done was the internal telephone book support. There had been a project with dedicated data processing center and 40-50 people that would provide an "internal telephone book" client/server support function (annual budget of something like $5m/annum). A couple of us designed an infrastructure that had a goal of being able to respond to a telephone book lookup in .25 secs elapsed (with a employee population of several hundred thousand) ... and that it would take less than 1/2 time person for keeping the data current ... and no dedicated data processing services.

This function was also made available in PROFS (PROFS group wrappered PROFS around several feature/functions ... not just VMSG/email).

with regard to assembler code & VM/CMS thread over in comp.arch ... VMSG was all 360 assembler while the phone book stuff was mostly PLS.

random refs:
http://www.garlic.com/~lynn/2000c.html#40
http://www.garlic.com/~lynn/2000c.html#41
http://www.garlic.com/~lynn/2000c.html#42

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 19:41:13 GMT
Anne & Lynn Wheeler writes:
part of the following refs was targeted at maintain session state replication that was critical for infrastructures like ims hot-standby

http://www.garlic.com/~lynn/99.html#67
http://www.garlic.com/~lynn/99.html#70


in the above reference with 60,000 "logged" in terminals and 2700 terminal messages per second (early '80s actual mainframe configurations) ... there was second order information gathered from real-live environment to feed into the HONE 3705 configurator ... effectively half the terminal 2700 msgs/sec were input that avg. about 125 bytes per message and half the terminal 2700 msgs/sec were output that avg. about 500 bytes per message.

configurations today would possibly be expected to handle thruput well over an order of magnitude larger.

misc. HONE configurator ref:
http://www.garlic.com/~lynn/2000c.html#30

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

WHAT IS A MAINFRAME???

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: WHAT IS A MAINFRAME???
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 21:11:23 GMT
jsaum@world.std.com (Jim Saum) writes:
had just started delivering CPUs. At that point, there had already been a plug-compatible manufacturer (PCM) market for mainframe peripherals (mainly tape and disk drives) for some years, but not for CPUs. The PCM market for mainframe CPUs, however, was pioneered by Amdahl Corp.

someplace there is old article crediting the origins of the 360 PCM controller market with a project I had worked on as an undergraduate to replace a 2702 telecommunications with an interdata/3 and a wire-wrap channel attach board (that then grew into a box with an interdata/4 with multiple interdata/3s). tape & disk PCMs came later (lots of guys from san jose plant site went off and started them, similar to gene doing CPU PCM).

there has also been claims that a lot of the characteristics of 3705s, NCP, and VTAM came about because of the appearance of that box and market.

random refs:
http://www.garlic.com/~lynn/96.html#30
http://www.garlic.com/~lynn/96.html#37
http://www.garlic.com/~lynn/99.html#12
http://www.garlic.com/~lynn/99.html#63
http://www.garlic.com/~lynn/2000c.html#36
http://www.garlic.com/~lynn/2000c.html#37

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 21:46:31 GMT
"GerardS" writes:
Yes, this is true. When VM (CP/67) first came out, some (if not most) operating systems couldn't handle 16 Meg of "real" memory, but of course, under CP, you just gave the guest 16Meg - 4K.

Gerard S.


a slightly different problem was somebody had originally modified the VM/370 boot image setup routine to use MVCL (aka move character long) with length of 16mbytes (as part of the conversion from CP/67 to VM/370). The MVCL insturction could clear memory and give back a residual length equal to 16mbyte minus actual memory (& the starting address of the field).

multiple byte 360 instructions and the majority of the 370 instructions were defined as testing the starting and ending address boundaries and not executing or nullifying the instruction if any of the address portions violated something (memory not available, protected, page fault, etc ... also instruction was interruptable for i/o and other types of interrupts ... storing the updated values for the portion of the operation not yet performance).

MVCL (& CLCL, aka compare logical character long) 370 instuction was defined to incrementally perform the operation and update address pointers and residual length of unexecuted portion. MVCL also allowed definition of padding character if target length was longer than origin length.

In any case, 370/125 (and 370/115) as originally shipped to customers mis-implemented the MVCL (& CLCL) instructions ... prechecking the ending address (start+length) and not executing the instruction at all if there was a problem (like exceeding available real storage). This resulted in a failure of the boot image setup routine (i.e. VM/370 could be booted on a 125 machine if the boot image had been built on a non-125 machine ... it just wasn't possible to build on a kernel on a 370/125 ... until they shipped a hardware fix for the bug).

Possibly the largest used application of 16mbyte virtual address space under CP/67 was numerous APL applications (after cambridge had ported APL/360 to CMS/APL). All APL/360 installations that I was aware of (at the time) limited APL workspaces to at most 64kbytes ... and commonly 32kbytes.

With CMS/APL there was something of an explosion in financial modeling applications, performance modeling applications, configuration modeling applications, etc (and to some extent gave rise to some of the origins of data processing capacity planning).

This gave rise to large use of CMS/APL by corporate financial planning people, product planning people, product forecasting people and competitive analysis people (filling at least the niche served by a lot of spreadsheet applications that are seen today).

It also formed the basis for the majority of the applications delivered to field/customer support people on HONE.

misc ref:
http://www.garlic.com/~lynn/2000c.html#30

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 24 Jun 2000 22:09:48 GMT
jsaum@world.std.com (Jim Saum) writes:
Which makes me wonder. I know that by the mid-70's IBM developers were using VM/370 (introduced in 1972) a lot for testing their target OS's, but CP/67 was available well before that, so why didn't these 16MB problems get fixed earlier? Because CP/67 was an unofficial (as opposed to TSS), below-the-radar thing with all the hard feelings and politics that contrast engendered, or perhaps because the developer sites didn't have mod 67's to run it?

while CP/67 was used extensively for product development (program edit, compile, etc) and simple regression testing of the operating system; very few people thot of using it for memory-size regression testing (& they didn't really believe their target customers would be doing a lot of production work under CP/67). Regression testing that was done was with typically sized (virtual) memory configurations expected at customer locations (not running CP).

The VM/370 work for ECPS and vs/1 handshaking (basically originally targetted for 370/138 & 370/148 market place; individual installations had done earlier "CP sensitivity" work on MVT & VS/1, but it wasn't being shipped in products) was one of the first major efforts for production operation of operating systems under CP (and could also be considered an precursor to existing mainframe LPAR support).

random refs:
http://www.garlic.com/~lynn/94.html#21
http://www.garlic.com/~lynn/94.html#27
http://www.garlic.com/~lynn/94.html#28
http://www.garlic.com/~lynn/94.html#35
http://www.garlic.com/~lynn/97.html#26
http://www.garlic.com/~lynn/99.html#74
http://www.garlic.com/~lynn/2000.html#8
http://www.garlic.com/~lynn/2000.html#63
http://www.garlic.com/~lynn/2000.html#86
http://www.garlic.com/~lynn/2000b.html#50
http://www.garlic.com/~lynn/2000b.html#52
http://www.garlic.com/~lynn/2000b.html#61
http://www.garlic.com/~lynn/2000b.html#62

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

WHAT IS A MAINFRAME???

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: WHAT IS A MAINFRAME???
Newsgroups: alt.folklore.computers
Date: Sun, 25 Jun 2000 02:47:00 GMT
kragen@dnaco.net (Kragen Sitaker) writes:
In article <uaegan5t5.fsf@mail.adcomsys.net>, Anne & Lynn Wheeler wrote:
>there has also been claims that a lot of the characteristics of 3705s,
>NCP, and VTAM came about because of the appearance of that box and
>market.

What characteristics are these? I read your references (always good reading) but found no clues.


there was/is a very complex division of function between pu4 (aka ncp) and pu5 (aka vtam) with complex interface protocol ... significantly increasing the investment to create a 37xx/pu4/ncp PCM (especially compared to the interdata-based 270x PCM we created when I was undergraduate).

the (referenced) implementation on S/1 had a lot more added value (than straight-forward 37xx PCM) since it did both pu4/ncp & pu5/vtam and used cross-domain protocol to talk to the mainframe (providing significant availability and performance improvements)

misc. ref
http://www.garlic.com/~lynn/99.html#70

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sun, 25 Jun 2000 03:37:51 GMT
kragen@dnaco.net (Kragen Sitaker) writes:
I don't think it requires a heck of a lot of OS support to write a CICS-style TP monitor; you just need to be able to get event notifications for I/O, right?

reference earlier post regarding 30,000-60,000 CICS users in early to mid 80s ... well under 100mip processing power ... doing 1000+ transactions per second. as mentioned there was problem with vtam session establishment if system cycled and all users attempted to re-establish their sessions concurrently (i.e. vtam session establishment page thrashing ... 20,000 simultaneous connection requests degrading to 90 minutes elapsed time ... it wasn't a problem with support 30,000-60,000 concurrent sessions ... it was a problem trying to perform 20,000+ simultaneous session establishments).

this is somewhat analogous (but different) to http web server problems in the mid-90s ... most TCP implementations had linear finwait lists (i.e. prior to http ... telnet, ftp, etc. had long running sessions ... even some larger configurations with 5,000 concurrent sessions ... number of session terminations in the finwait interval was very small ... so number of items on the finwait list was trivial). tcp has minimum 7 packet exchange ... with dangling finwaits for session termination. typical http might add a couple more packets to a tcp session but web servers doing 50-100 http hits per second sometimes built finwait list with a couple thousand entries and 98% of the available cpu sometimes were lost to running finwait list.

does anybody remember when netscape added ftp20.netscape.com, what it was, and why (compared to ftp1.netscape.com thru ftp?.netscape.com)?

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Any Series/1 fans?

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Any Series/1 fans?
Newsgroups: alt.folklore.computers
Date: Sun, 25 Jun 2000 06:19:02 GMT
bbreynolds@aol.comskipthis (Bruce B. Reynolds) writes:
My own systems are linked together multiple connections, one of which is the Local Communications Controller (LCC) an early implementation of the token- passing local area network (and similar to the loop controllers used in the IBM

my wife (& 3 others, assigned to ibm) has patent on LCC ... Loop Configured Data Transmission System ... US4195351

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

WHAT IS A MAINFRAME???

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: WHAT IS A MAINFRAME???
Newsgroups: alt.folklore.computers
Date: Mon, 26 Jun 2000 20:12:57 GMT
Anne & Lynn Wheeler writes: someplace there is old article crediting the origins of the 360 PCM controller market with a project I had worked on as an undergraduate to replace a 2702 telecommunications with an interdata/3 and a wire-wrap channel attach board (that then grew into a box with an interdata/4 with multiple interdata/3s). tape & disk PCMs came later (lots of guys from san jose plant site went off and started them, similar to gene doing CPU PCM).

there has also been claims that a lot of the characteristics of 3705s, NCP, and VTAM came about because of the appearance of that box and market.

random refs:
http://www.garlic.com/~lynn/96.html#30
http://www.garlic.com/~lynn/96.html#37
http://www.garlic.com/~lynn/99.html#12
http://www.garlic.com/~lynn/99.html#63
http://www.garlic.com/~lynn/2000c.html#36
http://www.garlic.com/~lynn/2000c.html#37

misc. more references on sna, pcm, CICS, some from previous threads & some repeats
http://www.garlic.com/~lynn/93.html#15 unit record &amp; other controllers
http://www.garlic.com/~lynn/93.html#16 unit record &amp; other controllers
http://www.garlic.com/~lynn/94.html#52 Measuring Virtual Memory
http://www.garlic.com/~lynn/94.html#54 How Do the Old Mainframes
http://www.garlic.com/~lynn/95.html#14 characters
http://www.garlic.com/~lynn/96.html#30 interdata and perkin/elmer
http://www.garlic.com/~lynn/96.html#37 interdata &amp; perkin/elmer machines
http://www.garlic.com/~lynn/96.html#39 Mainframes &amp; Unix
http://www.garlic.com/~lynn/96.html#9 cics
http://www.garlic.com/~lynn/97.html#15 OSes commerical, history
http://www.garlic.com/~lynn/98.html#33 cics ... from posting from another list
http://www.garlic.com/~lynn/98.html#34 cics ... from posting from another list
http://www.garlic.com/~lynn/98.html#49 Edsger Dijkstra: the blackest week of his professional life
http://www.garlic.com/~lynn/99.html#106 IBM Mainframe Model Numbers--then and now?
http://www.garlic.com/~lynn/99.html#12 Old Computers
http://www.garlic.com/~lynn/99.html#63 System/1 ?
http://www.garlic.com/~lynn/99.html#64 Old naked woman ASCII art
http://www.garlic.com/~lynn/99.html#66 System/1 ?
http://www.garlic.com/~lynn/99.html#67 System/1 ?
http://www.garlic.com/~lynn/99.html#189 Internet Credit Card Security
http://www.garlic.com/~lynn/99.html#195 Anti trust suits--IBMs' compared to Microsoft
http://www.garlic.com/~lynn/99.html#234 Computer of the century
http://www.garlic.com/~lynn/2000.html#16 Computer of the century
http://www.garlic.com/~lynn/2000.html#50 APPN vs TCP/IP
http://www.garlic.com/~lynn/2000.html#90 Ux's good points.
http://www.garlic.com/~lynn/2000b.html#0 "Mainframe" Usage
http://www.garlic.com/~lynn/2000c.html#36 Interdata, Perkin-Elmer, et al.
http://www.garlic.com/~lynn/2000c.html#37 Interdata, Perkin-Elmer, et al.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Java and Multos

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Java and Multos
Newsgroups: alt.technology.smartcards
Date: Wed, 28 Jun 2000 15:38:07 GMT
the issue of java doing binding time authentication has been brought up before ... and also techniques date back even earlier.

slightly related postings
http://www.garlic.com/~lynn/95.html#5
http://www.garlic.com/~lynn/2000.html#15

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 01 Jul 2000 15:50:14 GMT
kragen@dnaco.net (Kragen Sitaker) writes:
In article <72dolsgeb9neq27ddftdncbf515llrjnra@4ax.com>, Brian Inglis wrote:
>On 25 Jun 2000 14:39:18 GMT, mbeattie@sable.ox.ac.uk (Malcolm
>Beattie) wrote:
>>In article <XMy45.3951$Q7.97844@news-east.usenetserver.com>,
>>Kragen Sitaker wrote:
>>>So the SGI Octanes and Visual Workstations, with their crossbar I/O
>>>architecture, are mainframes? How about a Beowulf with an Ethernet
>>>switch as a backplane?
>>
>>A modern mainframe running VM provides 500 Mbytes/sec of bandwidth
>>between its guests via IUCV


my wife and I sat thru a s/390 (future) roadmap presentation last week. One of the foils used was something she had drawn 25 years ago when she was in POK and responsible for non-shared-memory multiprocessing (aka cluster) architecture

random refs.
http://www.garlic.com/~lynn/99.html#71
http://www.garlic.com/~lynn/99.html#77
http://www.garlic.com/~lynn/99.html#100
http://www.garlic.com/~lynn/2000.html#13

another part of the roadmap presentation was ficon ... this I haven't looked at in nearly 10 years. It appeared to be the work that some people were doing on FC-4 (fiber-channel standard) level mapping synchronous half-duplex channel protocol on top of asynchronous dual-simplex (i.e. dedicated fiber for transmission in each direction, aka full-duplex) fiber-channel.

another bullet for the s/390 roadmap was high speed queued I/O ... which also brought back memories. I don't know if anything was done with it but at the time we were doing fiber-channel cluster scaleup ... another person and I wrote up patent application for high speed queued I/O. When I mentioned that, the person doing the presentation commented that sometimes it takes decades for technology to show up in mainframes.

random refs:
http://www.garlic.com/~lynn/95.html#13
http://www.garlic.com/~lynn/99.html#145
http://www.garlic.com/~lynn/2000c.html#12
http://www.garlic.com/~lynn/2000c.html#21
http://www.garlic.com/~lynn/2000c.html#22

... misc. posting from fiber channel standard mailing list
Date: Tue, 09 Jul 91 16:52:54 PDT
To: fibre-channel-ext@Think.COM
Subject: Revisting Bi-Directional Sequences

I've been looking at what it would take to map (CCWs) Channel Command Words (Block Mux to Dal) onto FC-PH and have hit the same restriction found some time ago. The problem is that CCW operations are necessarily bi-directional in nature, and require simultaneous bi-directional transport mechanisms to be supported within FC-PH.

....

The sentiment of the working group was that FC-PH already provides a dual-exchange solution to this problem. However, there is no way to relate or control dual-exchanges in FC-PH currently. In addition, there are several other reasons not to use dual-exchanges:

1. Operations requiring dual-exchanges may not be initiated if two exchanges are not available.

2. Twice the number of exchanges are used up. This will likely result in a costlier implementation.

3. Dual-exchange use will affect operation recovery.

4. An exchange is the wrong level (too-high) to provide support for bi-directional transfer.

I propose that the FCS working group fully investigate the issue of supporting bi-directional Sequences within an Exchange as soon as possible since FC-PH may be impacted. I don't believe that full reverse direction Sequence support is required as I'm assuming that traffic in the reverse direction is minimal. This is certainly true of CCW operations and should be explored for IPI, SCSI, and other FC4s. This limitation may result in a fairly simple change to FC-PH while providing effective simultaneous bi-directional operation support.

I'd like to discuss this issue in more detail next week while we're discussing other FC-4 to FC-PH mapping issues.


--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Definitive SSL explanation please...

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Definitive SSL explanation please...
Newsgroups: alt.security,comp.security.misc
Date: Sat, 01 Jul 2000 21:00:07 GMT
"James Butler" writes:
I am quite amazed at the lack of information on SSL. All is rather vague. Does anyone have a definitive description of how it works? I have a doc from Netscape but is VERY vague. Any help much appreciated, J.

try the internet RFCs for "TLS" ... for collection &/or related ... go to
http://www.garlic.com/~lynn/rfcietff.htm

select RFCs listed by Term (term->RFC#)

and from the Acronym fastpath in RFCs by Term/Keyword select TLS for a list of related IETF RFCs (which then can be selected).

also see
http://www.openssl.org/
http://www2.psy.uq.edu.au/~ftp/Crypto/
http://www.drh-consultancy.demon.co.uk/pkcs12faq.html

somewhat related discussions.
http://www.garlic.com/~lynn/2000.html#45
http://www.garlic.com/~lynn/2000.html#47
http://www.garlic.com/~lynn/2000.html#48
http://www.garlic.com/~lynn/2000b.html#40
http://www.garlic.com/~lynn/aepay4.htm#comcert8
http://www.garlic.com/~lynn/aepay4.htm#comcert15
http://www.garlic.com/~lynn/aepay4.htm#comcert16
http://www.garlic.com/~lynn/aepay4.htm#dnsinteg2

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Disincentives for MVS & future of MVS systems programmers

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Disincentives for MVS & future of MVS systems programmers
Newsgroups: bit.listserv.ibm-main,alt.folklore.computers
Date: Sun, 02 Jul 2000 02:06:13 GMT
"John S. Giltner, Jr." writes:
I do not remember TCP/ IP being a big player 8-10 years ago, in the commercial world. The big Internet take off has only been over the last 5-7 years or so and only the last 2-3 for business functions. We looked at using TCP/IP in 1992, but none of our large customer wanted to do it. We only had 2 customers that wanted it and they did not generate enough workload to support the costs. They did not generate enough workload to justify buying a PC.

there various kinds of disincentive for tcp/ip on mainframe ... including pricing. there were also episodes like the initial tcp/ip implementation integrated into vtam had significantly higher thruput than lu6.2 and there was direction that it had to be redone to be significantly lower thruput than lu6.2.

random refs.
http://www.garlic.com/~lynn/2000.html#51
http://www.garlic.com/~lynn/2000.html#53
http://www.garlic.com/~lynn/2000.html#85
http://www.garlic.com/~lynn/2000.html#90
http://www.garlic.com/~lynn/2000c.html#51
http://www.garlic.com/~lynn/2000c.html#52
http://www.garlic.com/~lynn/2000c.html#54
http://www.garlic.com/~lynn/2000c.html#56
http://www.garlic.com/~lynn/99.html#201
http://www.garlic.com/~lynn/99.html#202
http://www.garlic.com/~lynn/internet.htm

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sun, 02 Jul 2000 03:12:24 GMT
something else in the s/390 roadmap was outboard TCP protocol handler.

one of the problems with one of the mainframe channel attach boxes in the 80s was that it basically was a bridge ... not a real router; the mainframe had to not only do the tcp & ip header stuff inboard, but fragmentation & MAC headers before passing it to the outboard box ... which then just had to drop the packet on enet or t/r (which the mainframe also had to handle).

The box i used for rfc1044 implementation was full router ... could pass it a ip packet ... and it would handle fragmentation & MAC stuff (outboard). Later boxes ... about time of T3/NSFNET2 activity included additional outboard protocol processing (including large packets support ... fragmentation for outbound, re-assembly for inbound). Later objective was to pass a TCP packet & have it do both IP & MAC layer processing.

random refs:
http://www.garlic.com/~lynn/96.html#14
http://www.garlic.com/~lynn/96.html#17
http://www.garlic.com/~lynn/98.html#49
http://www.garlic.com/~lynn/98.html#50
http://www.garlic.com/~lynn/99.html#36

other work on outboard processing in 80s w/XTP (a lot of testing done w/100mbit FDDI)
http://www.garlic.com/~lynn/99.html#0
http://www.garlic.com/~lynn/99.html#164
http://www.garlic.com/~lynn/99.html#207
http://www.garlic.com/~lynn/2000b.html#5

.... a reply (from somebody else) regarding CCWs on FCS.
Subject: Reply to Revisiting Bi-Directional Seque
Date: 10 Jul 91 16:55:14 EDT
To: fc <fiber-channel-ext@Think.COM>

...

I guess that the basic question that you still have to answer, at least for me, is why you need a fully bidirectional Sequence (or Exchange) in FC when the OEMI (or FIPS-60 or whatever) that the CCWs run over today only operates in half-duplex mode exactly like the current FC exchange definition!! If you can explain that in some detail we might even be able to have a sensible discussion on the subject - no guarantees of course!

My view at the moment is that the architecture of Fiber Channel utterly collapses if true bidirectional Sequences are required i.e. we can throw away FC-2 completely and start again. The replacement protocol would need to be tightly synchronized and would require that frames be completely processed in real-time upon reception. The reason for this time-sensitivity is that in order to be able to accurately decode the "return direction information", the receiver needs to be able to recreate the status of the link that the generator saw at the time of transmitting that information e.g. had it started to receive the Sequence that is "in flight" towards it etc.

I will be presenting Mark 2 of my FC-4 Paradigm next week in Valley Forge, along with an updated FC-4 for IPI. That work has convinced me that, far from requiring bidirectional Sequences, IPI-3 CANNOT be made deadlock-free if bidirectional operation is allowed.


--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Disincentives for MVS & future of MVS systems programmers

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Disincentives for MVS & future of MVS systems programmers
Newsgroups: bit.listserv.ibm-main
Date: Sun, 02 Jul 2000 08:34:22 GMT
ldw@BEST.COM (Leonard Woren) writes:
Funny, I got on the ARPAnet for the first time using TELNET and FTP back in 1973 using UCLA's ACP (Arpanet Control Program) for MVT.

That was around 12 years before the term "Internet" came into use, and even a number of years before TCP/IP existed. It was also years before PCs, DOS, Windoze, and all the other toys. Somewhere amongst my junk, I have a single 11 x 14 7/8 sheet line printer map of the 1973 worldwide ARPAnet -- all 43 nodes.


as an aside, the internal network was larger than the arpanet/internet from just about the beginning until into the mid-80s.

random ref:
http://www.garlic.com/~lynn/99.html#112

with respect to UCLA (from rfc1251)
http://www.garlic.com/~lynn/2000.html#72

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

TF-1

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: TF-1
Newsgroups: comp.arch,comp.sys.super,alt.folklore.computers
Followup-To: yes
Date: Sun, 02 Jul 2000 18:32:32 GMT
Anne & Lynn Wheeler writes:
I think that some of this was sponsored out of a lab in Kingston that started out with a whole load of FPS boxes (attached to a couple IBM mainframes) ... working on various chemical & atomic calculations, I vaguely remember them announcing along the way various calculation thresholds in the gflops range in the mid to late '80s. Then there were upgrades with FPS boxes in combination with IBM 3090s with vector facility.

checking some archives.

In June of '86, the Kingston Engineering & Science Center had 20 x64 FPS "attached processors" configured with range of memories between 32mbyte to 512mbyte that had peak of 1.5gflop.

... also from apr '87 CNSF (cornell national supercomputer facility) announcement (note the FPS disk subsystem was RAID with 40mbyte/sec transfer):

The CNSF provides a configuration consisting of an IBM 3090-400 with four vector facilities and five attached scientific computers from Floating Point Systems, giving a peak throughput of over 600 megaflops. The IBM 3090-400 VF has a peak performance of 432 megaflops, with 128 megabytes of memory, 512 megabytes of expanded storage, and 105 gigabytes of disk storage. Each application may use up to 1 gigabyte of memory. Software support exists for vectorization, including a vectorizing compiler and vector libraries, and for parallelization. VM/XA SF (CMS) is the operating system; both interactive and batch modes are provided.

The five FPS 264 scientific computers each have 650 megabytes of disk storage and 38 megaflops peak speed. Four of the FPS processors have 36 megabytes of memory each, and one has 16 megabytes of memory. These processors are connected by a high-speed bus for parallel processing. An IBM 4381 and two additional FPS 164 processors provide a development environment. All the IBM and FPS systems fully support ANSI-standard FORTRAN-77.


... & from s-comput sep. 86


List of Supercomputers on Bitnet/Netnorth/Earn
        ==============================================

Bitnet        Center               1985-1986          1987
Nodename        name                                (tentative)
== ========  ===================== ================ ================
1            JVNC - Princeton      Cyber 205        ETA-10
2  ASUACAD   Arizona State                          IBM 3090-200/VF
3  BOSTONU   Boston University     IBM 3090-200/VF  Same

4  CORNELLD/ Theory - Cornell      IBM 3084/QX128,  IBM 3090/400,
   CORNELLF                        FPS 264's        FPS 264's
5  CPWPSCA/  Pittsburgh            Cray X-MP/??     Same
   CPWPSCB
6  CSU205    Colorado State        Cyber 205        Same
7  DB0ZIB21  Berlin - Germany      Cray 1M          Same
8  DFVLROP1  German Aerospace      Cray 1S          Same
9  DGAIPP1S  Max Planck - Germany  Cray X-MP/14     Cray X-MP/24
10 DJUKFA11  Juelich - Germany     Cray X-MP/22     Same
11 DKAUNI46  Karlsruhe - Germany   Cyber 205        Same
12 DS0RUS1I  Stuttgart - Germany   Cray 1M          Cray 2
13 FSUSUP    Florida State         Cyber 205        ETA-10
14 HASARA5   Amsterdam U - Neth.   Cyber 205        Same
15 ISUMVS    Iowa State            NAS/AS 9160VPF   Same
16 NCSAVMSA/ NCSA - Illinois       Cray X-MP/24     Cray X-MP/48
   NCSAVMSB
17 SDSC      San Diego             Cray X-MP/48     Same
18 UCBLYNX   U C Berkeley          Cray X-MP/12     Cray X-MP/14
19 UCBCMSA   U C Berkeley          IBM 3090-200/VF  same
20 UCLAMVS   UCLA                  IBM 3090-200/VF  Same
21 UGA205    Univ of Georgia       Cyber 205        Same
22 UNCACDC   Univ of Calgary, CAN  Cyber 205        Same
23 UTORONTO  U of Toronto          Cray X-MP/22     Same
24 VSP1      Boeing Data Services  Cray X-MP/24     Same
25 VTVM1     Virginia Polytech     IBM 3090-200/VF  Same

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

ANSI X9.62 and X9.63

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: ANSI X9.62 and X9.63
Newsgroups: sci.crypt
Date: Mon, 03 Jul 2000 04:06:20 GMT
TAY YUE WENG writes:
Does anybody know where can I download these copies if it is free? Can someone send a copy to me if membership is required?

see
http://www.x9.org/ for more information

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 14:51:49 GMT
jmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
Yes, and yes, respectively. The 3274 and 3174 controllers were separate boxes with some amount of intelligence, capable of driving from 8 to 32 terminals depending on the model. Some 3270s were attached directoy to dedicated console ports on the machine, although I don't know how much of a 3x74 they stuck in there to drive it.

the (original) 3272 controllers and 3277 terminals had the logic in the heads with 3272 controller handling the channel interface. 3274's moved head & keyboard logic back into the controller for 3278s & 3279s terminals.

There were 327x controllers that talked bisynch telecommunication protocol (instead of direct channel attach) ... and later SDLC telecommuncation protocol (& "LU2").

327x had a problem with repeat key being way too slow and also if you happened to be typing at the moment the screen was written to ... the keyboard would lock up.

there was a hack on the 3277 where you could patch a resister inside the 3277 keyboard and change the repeat key delay and rate (frequently used for moving the cursor around the screen in full screen operations, the resister values determined the repeat delay and rate). A slight human factors in this was that if you made it too fast, it was "higher" than the screen refresh rate i.e. in the case of repeat on cursor movement key, the cursor would continue to move after you lifted the key ... it just a little while to get used to the cursor coasting and be able to raise the key at the right moment so it stopped coasting under the correct position.

For the keyboard locking, a FIFO box was built that fit where the 3277 keyboard plugged into the head (unplug the keyboard, plug in the FIFO box into the head and plug the keyboard into the FIFO box).

3278, 3279, etc moved all that logic back into the 3274 controllers (reducing per terminal cost) and it was no longer possible to improve on the human factors. I kept a modified 3277 around well into the late '80s.

random urls:
http://www.garlic.com/~lynn/98.html#49
http://www.garlic.com/~lynn/99.html#28
http://www.garlic.com/~lynn/99.html#69
http://www.garlic.com/~lynn/99.html#108

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 15:22:53 GMT
jcmorris@jmorris-pc.MITRE.ORG (Joe Morris) writes:
Back in the 1970s there were several studies (which I can't cite by name; it's been too many years) that examined the human engineering of terminal use. One relatively consistent finding was that the time between the dispatching of a request (typically by hitting the RETURN or ENTER key) and the arrival of the first response character should not exceed about 1.5 seconds because after that period the "typical" user's thought process would begin to drift to other, unrelated topics, and would require additional time to return to the current task once the output finally began to be displayed.

there was a presentation at SE symposium in early 70s held at 14th st. bridge marriott in wash.

it basically measured perception of "instantaneous response" threshold (i.e. couldn't tell if there was delay) ... which turned out to vary from person to person (from about .1 second to about .25 second).

there was joint report written around 1980 by some YKT research people and a San Jose GPD person about effect of system delays on people productivity (we had been working on system responses at .1 second versis a lot of people saying 1.0 seconds was good enuf). The research found that there was measurably increased productivity for system response down to .2 seconds ... and then there was less good correlation (possibly explained by the 1970 research).

The research did find that variable system response had bad effect on people ... productivity was effected by approx. two times the variation. If the avg. response was .5 seconds and there was specific response that was 1.5 seconds ... then the person's attention would continue to wonder 1.5-0.5=1.0 seconds after the system responded. This not only applied to interactive activity but also things like batch compiles. If a compile would nominally take a minute ... but sometimes took 5 minutes ... a person's attention would continue to wonder for several minutes after the compile finished.

That report may have been contorted into supporting agendas regarding not having to support better than 1.5 second system response. However the original research about attention wondering was with regard to variability & people's expectations ... aka if people expected system to respond in 0.5 seconds and it periodically took 1.5 seconds ... then their attention started to drift after the system didn't respond at the expected time and would continue to drift for period after the system did respond.

It was still possible to have productivity improvement with .2 second response if the frequency of variability was kept to a tolerable level.

random refs:
http://www.garlic.com/~lynn/98.html#2
http://www.garlic.com/~lynn/98.html#46
http://www.garlic.com/~lynn/2000b.html#20
http://www.garlic.com/~lynn/2000b.html#25

guy from San Jose GPD had an article in IBM Systems Journal, v20n4, 1981, "Interactive User Productivity".

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 15:58:22 GMT
jata@aepiax.net (Julian Thomas) writes:
There was one internal to IBM that was used to justify a fast link between the building housing the mainframes and the building where the engineers were doing design work on their terminals.

when growth at STL outgrew available space, in '81 they relocated something like 300 people from the IMS group to a rented building about half-way between the main plant site and STL.

At the time, they ran a WAN using a T3 collins digital radio from bldg 12 on the main plant site to bldg. 90 (STL) ... there was a repeater tower on a hill between 12 & 90. It also ran between bldg 12 and bldg 29 (Los Gatos VLSI lab) ... again with repeater tower on the hill above the san jose dump. Microwave was put in between bldg. 12 and the rented bldg. that the IMS group moved into.

Because of the response issues, "remote 3270s" were not considered adequate for the IMS developers (i.e. 3274 controllers with 32 terminals running over 19.2 SDLC link).

HYPERChannel was selected for the project. Basically A220 channel attach adapters, A510 remote device adapters, and A710 link adapters driving a T1 channel thru the campus WAN facility.

A HYPERChannel A510 remote device adapter simulated a 370 channel and allowed attachments of 370 controllers. A HYPERChannel A220 was a 370 control box and attached to a real 370 channel. HYPERChannel ran a protocol over a 50mbit/sec. LAN. A HYPERChannel A710 link adapter would drive T1/T2 links and act as a bridge between HYPERChannel LANs.

I wrote the support at the 370 end that "packaged" up 370 device channel programs and transmitted them to a remote A510 ... where they were executed remotely in the A510 remote device adapter (driving real 370 control units).

This support provided subsecond response on "local" 3270 terminals for 300 people ... multiplexed over a single T1 (1.5mbit/sec link).

There was a couple bugs encountered along the way. While I could handle the speed mismatch between multiple 640kbyte/sec 3270 controllers and the 1.5mbit/sec (approx. 150kbytes/sec) link ... it turns out that A710s had a bug and weren't really "full-duplex" controllers. The A710s really only operated in "half-duplex" mode and having outboard traffic from the 370 mainframes to the remote side at the same time as inbound traffic from controllers cause problems. They eventually built a real full-duplex link adapter, the A715 to address the problems.

This configuration was replicated in Boulder when they moved the IMS field support team to a bldg. on the other side of I70. Because of regulations weren't able to use microwave between the roofs of the two buildings and so instead installed T1 infrared modems on polls on the two buildings. There was concern about signal quality with the infrared modems because of rain fade. However, the worst it got was a half dozen bit errors during a white-out snow storm when nobody was able to get into work. We did have a problem with the alignment of the infrared modems as the sun progressed across the sky during the day and heating different sides of the building resulting in building uneven building expansion which affected the modem alignment.

random urls:
http://www.garlic.com/~lynn/94.html#23
http://www.garlic.com/~lynn/94.html#24
http://www.garlic.com/~lynn/94.html#43
http://www.garlic.com/~lynn/94.html#55
http://www.garlic.com/~lynn/96.html#14
http://www.garlic.com/~lynn/96.html#27
http://www.garlic.com/~lynn/99.html#119

turns out that there was a side-effect of remoting the channel attached 3270s with HYPERChannel. After getting the 3270 controllers removed from directly attachment to the real 370 channels ... the thruput of the overall mainframe system increased by approx. 10% (in addition to showing to measurable degradation in system response). It turns out that the 3270 controllers (which operated at 640kbbyte/sec and also had slow cchannel bus handshake overhead) were sharing channels with disk controllers (which operated at 3mbytes/sec). Routing all 3270 traffic thru the A220 channel adapter significantly reduced 3270-related channel busy ... allowing measurable additional channel capacity for doing disk i/o.

more random urls:
http://www.garlic.com/~lynn/93.html#27
http://www.garlic.com/~lynn/96.html#15
http://www.garlic.com/~lynn/96.html#17
http://www.garlic.com/~lynn/98.html#34
http://www.garlic.com/~lynn/98.html#49
http://www.garlic.com/~lynn/98.html#50
http://www.garlic.com/~lynn/99.html#36
http://www.garlic.com/~lynn/99.html#123

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 16:32:02 GMT
Anne & Lynn Wheeler writes:
guy from San Jose GPD had an article in IBM Systems Journal, v20n4, 1981, "Interactive User Productivity".

the work that went into the above was also used to show that there was measurably higher productivity with subsecond response and that "remote" 327x controllers were not adequate (i.e. 3274 sdlc over 9.6 or 19.2 could not provide subsecond response time).

side-benefits of remoting local 3274 & 3272 over T1 HYPERChannel was that getting those boxes directly off local 370 channels and improving aggregate system thruput by 10-15% because of increase disk i/o thruput (because local 3274 & 3272 controllers were no longer responsible for high channel busy interference).

part of the problem at the time was you could only get 16 channels on a 370. there just weren't enuf available channels to dedicate specific channels to specific device types.

there was a report for customers that did come out sometime after the HYPERChannel experience that did recommend (if the customer had available channels) to separate channels with disk controller attachments and 327x controller attachments.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 16:48:33 GMT
Anne & Lynn Wheeler writes:
side-benefits of remoting local 3274 & 3272 over T1 HYPERChannel was that getting those boxes directly off local 370 channels and improving aggregate system thruput by 10-15% because of increase disk i/o thruput (because local 3274 & 3272 controllers were no longer responsible for high channel busy interference).

another problem was that for the first couple years ... the 3274s had a sporadic problem requiring them to be rebooted (IMPL) ... initially several times a day ... but eventually maybe only once a day.

we found a trick ... that if you executed a HDV/CLRIO instruction sequence in a tight loop against every device (address) on a local attached 3274 ... it would reboot itself w/o requiring manual operater intervention.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 17:25:24 GMT
Anne & Lynn Wheeler writes:
another bullet for the s/390 roadmap was high speed queued I/O ... which also brought back memories. I don't know if anything was done with it but at the time we were doing fiber-channel cluster scaleup ... another person and I wrote up patent application for high speed queued I/O. When I mentioned that, the person doing the presentation commented that sometimes it takes decades for technology to show up in mainframes.

work on high speed queued i/o (that i was initially involved in) was with a project called VAMPS in the 1975 time-frame.

The 370 115/125 were done by the Boeblingen Germany lab. It was actually a shared memory bus with up to 9 microprocessors. The 115 had all microprocessors the same ... all with different microcode loads depending on the dedicated controller function ... telecommunication, disk, etc ... and one of the microprocessors had the 370 instruction set microcode load. The 125 was identical to the 115 except the microprocessor with the 370 microload was not the same as the others ... but something that ran about 50% faster.

VAMPS was to build a 370/125 where there were between two to five microprocessors running the 370 instruction set microcode load in a shared memory configuration.

To simplify development for a SMP VM/370 configuraiton, I dropped most of the SMP support into microcode engine ... and ran the remaining reduced function CP kernel on a single processor. This is somewhat analogous to the current LPAR/PRSM support.

The reduced function CP kernel would place virtual machines on a pending dispatch queue ... and when it had no more work it went to the microcode dispatcher. For virtual machine work that couldn't be handled in the microcode, it would place an element on the pending work queue and attempt to enter kernel mode. If another processor was already in kernel mode, the processor would just go off and look for work on the dispatch queue. Basically this was a high-speed queued dispatch support.

Since I also had the disk controller microcode, created a high speed queued I/O interface for the disk interface as well. Basically the abbreivated kernel put work requests on the disk controller queue. The disk controller pulled things off the queue (potentially out of order), did the work, and put the result on a pending queue. Interrupt in the abbreviated kernel could occur ... if there wasn't already a processor executing the abbreviated kernel. This was the original high speed queued I/O interface that I worked on.

When VAMPS got killed, basically a "software" version of the VAMPS implementation was built for 158/168 SMP "attached processor" machines. This didn't have the high-speed queued i/o interface ... but did have work queue for running virtual machines ... and when a processor was no longer able to handle a virtual machine it attempted to get the global kernel lock. If it failed to get the global kernel lock, it queued the work request and attempted to run some other virtual machine.

random refs:
http://www.garlic.com/~lynn/94.html#21
http://www.garlic.com/~lynn/94.html#27
http://www.garlic.com/~lynn/94.html#28
http://www.garlic.com/~lynn/95.html#3
http://www.garlic.com/~lynn/2000c.html#30

A little bit of the high-speed queued i/o showed up in the HYPERChannel work ... although the hyperchannel was able to do out-of-order processing very well ... but since the CCW "package" was being loaded into the remote A510/A515 remote device adapters for channel simulation ... it was possible to do a little bit with I/O package operations on the A51x

random refs:
http://www.garlic.com/~lynn/94.html#23
http://www.garlic.com/~lynn/94.html#24
http://www.garlic.com/~lynn/96.html#14
http://www.garlic.com/~lynn/96.html#27

The VAMPS high-speed queued i/o, the HYPERChannel experience, and the HSDT project experience (High-speed data transport) all contributed to the work on the high speed queued i/o interface for fiber channel adapters.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 21:57:48 GMT
jcmorris@jmorris-pc.MITRE.ORG (Joe Morris) writes:
If this was ever documented as a bug, it should have been described as a remote re-IMPL technique -- and would be another proof of the old joke that "a feature is a bug that's been documented."

it really was a feature; both HDV & CLRIO instructions were kernel mode only instructions ... so you wouldn't have application programs capable of doing it ... and the loop in the kernel to do it had to be specifically programmed. These were things put into the code by the engineering groups and didn't normally make it into the documentation &/or operating system (you had to go spend time with the engineers to find out little tricks they used while they may have been developing the boxes).

I was doing a bullet proof i/o supervisor for the disk engineering lab. they had all these test cells (disk stuff inside steel cages ... about 4' sq & 7' high ... with combination padlocks ... inside a secure room, inside a secure building, etc). since they were stuff under development the boxes didn't alwas behave as specified in the manual ... but they still needed to do testing connected to a mainframe. A room might have 2-3 different mainframes and a dozen or so test cells that were undergoing development & test.

At the time, if MVS was ipl'ed on one of the mainframes while test cells were connected and doing anything ... mean-time-between mvs crash was about 15 minutes. As a result, the guys on the test cells needed dedicated machine time ... running a small, dedicated real-time monitor.

The objective of making the I/O supervisor absolutely bullet proof ... so no matter what I/O things happened ... the I/O supervisor wouldn't contribute to any sort of system failure. This would allow the various mainframes to all be run with operating systems ... performing a number of useful services while concurrently supporting testing of multiple test cells.

other components had similar reboot features. It was possible to get a 303x channel director to reboot if all six channels were hit in a tight loop with CLRCH instruction.

random refs:
http://www.garlic.com/~lynn/95.html#3
http://www.garlic.com/~lynn/96.html#18
http://www.garlic.com/~lynn/96.html#27
http://www.garlic.com/~lynn/97.html#15
http://www.garlic.com/~lynn/99.html#31
http://www.garlic.com/~lynn/99.html#98
http://www.garlic.com/~lynn/2000.html#78

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Mon, 03 Jul 2000 23:11:19 GMT
kragen@dnaco.net (Kragen Sitaker) writes:
Were the I/O devices capable of DMA? It seems that if the disk was DMAing to the wrong physical memory, it would be very difficult to avoid system failure. (The I/O supervisor wouldn't even need to contribute. :)

devices weren't capable of DMA'ing directly into memory ... all I/O went thru the channel hardware interface where the channel hardware controlled the address & length of data transfer.

the channel, controller & device architecture was tightly controlled and including specifications about things like short busy, interrupts in specific sequences, error indicators stored in specific ways.

flaky devices could present "short busy" ... where the prescribed processor was to immediately retry the operation ... however the short busy might never clear ... and the processor might go into a tight loop retrying the operation.

a flacky device also might forget to provide an interrupt at all.

a standard device was prescribed at only presenting an error interrupt in conjunction with on ongoing operation. a flaky device might present an error interrupt out of the blue ... not in conjunction with anything else.

operating system could hang because of tight loop or missing interrupts (not real crash ... but something requiring manual reboot to clear the conditionq). Another situation was hot interrupts which could exhaust system resources and lead to system failure because of running out of storage (similar but different to some of the internet denial of service attacks which exhausted system resources and resulted in system crash). Hot interrupts might need both device and channel fenching to get the system back under control.

Other situations were simple software logic bugs in the kernel where the device specifications had the software design operating in a specific way because the device alwas worked in a specific way. When the device operated in a very anomolous manner ... it would expose a software bug in the kernel. There could be hundreds of these conditions every day that had never been seen in a production data processing operation (or possibly less than once or twice per year across the whole machine install base of thousands & thousands of mainframes). the situation was slightly aggravated by the fact that the mainframe operating system had extensive error retry and error recovery routines ... in some cases 10-100 times the amount of error retry & recovery code compared to typical non-mainframe operating systems. As a result there was a lot more code that could have possible logic failures when exposed to extremely anomolous & unanticipated modes of operation.

These weren't production devices ... they were engineering hardware in the process of development and test. There were hundreds of anomolous conditions that never had been experienced in normal production operation. Rather than a controlled, data processing environment operating according to some standard ... the disk engineering development and test environment was an extremely hostile data processing opreation where severe error and anomolous operation was the rule instead of the exception.

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Does the word "mainframe" still have a meaning?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Fri, 07 Jul 2000 16:02:15 GMT
seebs@plethora.net (Peter Seebach) writes:
Anyway, "conditionq" looks like a shorthand for "condition queue" which sounds like, if it's not a technical term, it ought to be.

but it really was figner fumble

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Wed, 05 Jul 2000 16:16:01 GMT
jmaynard@thebrain.conmicro.cx (Jay Maynard) writes:
This is another typo, but this time for a term that you may not have heard of: "fencing". Fencing a channel, or a device, on a 370/390 means to disable it as much as possible, and then to ignore any further I/O interrupts from it; I don't know how this is done at the device level, but at the channel level, the I/O interrupt mask is set to disable further interrupts from that channel.

oops, sorry about the finger-fumble/brain-check

a lot of isolation was at the controller level ... first hit every address on the controller with hdv/clrio ... then hit every address on the channel with hdv/clrio and then clrch.

the development & test labs had all the test cells on channel switches (I don't have reference at the moment so can't double check the model number) some number of the older 2919(?) with rotary switches, and a couple 3919(?). it was possible to dedicate a channel per test cell (still a significant improvement over having dedicated mainframe per machine).

the development & engineering was on the 2nd floor in bldg. 14 ... before moving to bldg. 86. The product test lab was in bldg. 15. Product test lab was a separate organization from development and engineering and had authority to not release a product for first customer ship if it failed produuct test. Product test lab had some rather interesting boxes ... including a rather large environmental test chamber (humidity, air pressure, temperature, etc) and various kinds of error injection boxes.

one of the things about mainframe ... both hardware & software ... after development, alpha tests, beta tests, etc ... was all done ... then there was a six month (elapsed) product test & Q/A cycle before first customer ship (FCS). there seem to be a lot of stuff these days that ship alpha or beta test as product (as soon as development finishes).

random urls:
http://www.garlic.com/~lynn/94.html#15
http://www.garlic.com/~lynn/95.html#3
http://www.garlic.com/~lynn/96.html#18
http://www.garlic.com/~lynn/99.html#31
http://www.garlic.com/~lynn/99.html#54

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Does the word "mainframe" still have a meaning?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Wed, 05 Jul 2000 16:21:31 GMT
Anne & Lynn Wheeler writes:
bldg. 15. Product test lab was a separate organization from development and engineering and had authority to not release a product for first customer ship if it failed produuct test. Product test lab

there was even separation policy that people/badges with access to development & enginnering could not also have access to product test (& product test people couldn't have access to development & engineering). there were only a couple badges that I was aware of that were authorized for both environments.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Sat, 08 Jul 2000 16:16:27 GMT
jmfbahciv writes:
What was the reasoning behind that enforced separation? It doesn't sound terribly efficient to me.

I've observed (& other people have also) that if product and product test (quality control )report to the same executive ... that when product test says that shipping of boxes has to be delayed for six months because of engineering &/or quality reasons ... an executive might over-rule the product test group and ship the box anyway. having the responsibilities in completely different organizations help separate possibilities of internal "conflict of interest" with regard to executive decisions about shipping a product vis-a-vis the quality control of the product.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Does the word "mainframe" still have a meaning?

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Does the word "mainframe" still have a meaning?
Newsgroups: alt.folklore.computers
Date: Wed, 05 Jul 2000 22:43:05 GMT
.... 3880/3830 reference
http://www.garlic.com/~lynn/99.html#54

above ref. was situation where i got initial blame for very poor performance in the product test lab (bldg. 15). They had a 3033 with operating system providing a lot of online services as well as product testing services on a dozen channels.

at the time of the mentioned incident they had a 3830 disk controller with 16 3330-II disks drives supporting online services. the 3880 disk controller was starting product test and they appeared to have one that was reasonably far along & passed all the functional & error handling tests. One weekend they decided to swap the 3880 for their production 3830 to see what happened.

that monday their online performance went all to pieces and I started getting calls. Turns out that product test had a rather simple performance acceptance test ... it was basically a single stream VS1 jobstream that ran on 3330-ii and compared elapsed time with 3830 controller and 3880 controller. the 3880 had already passed this performance test.

the problem was rather more complex. the 3830 was a fast horizontal microcoded machine that handled all operations. The 3880 was a JIB-prime (vertical) microprocessor with hardware assist to handle actual data-movement. While 3830 only need to handle 1.5mbytes/sec data movement and the 3880 needed to handle 3mbyte/sec data streaming mode ... the old 1.5mbytes/sec was a byte at a time channel transfer ... while data streaming was 8bytes at a time channel transfer (i.e. channel handshaking was occuring 1/8th as often).

In any case, while 3880 supported higher peak data transfer ... the rest of the 3880 processing was much slower than the 3830. One of these areas was in controller "house-keeping" after a disk operation completes. In the 3830 case, this was effectively instantaneously but it the 3880 case, it was taking 1mills to 1.5mills longer. In order to have the 3880 pass the VS1 performance acceptance test, they modified the way the controller operates so that end-of-operation interrupt was presented to the channel/processor before the controller had completed housekeeping.

In the VS1 case, this resulted in posted an interrupt to the operating system, waking up some application/subsystem, the application/subsystem doing some processing and then initiating the next I/O operation. Effectively the controller house-keeping overhead was being overlapped with VS1 processing.

However, in the online service case with lots of concurrent tasks going on, thee were almost alwas requests waiting for the controller. When the controller signaled end-of-operation to the channnel/processor ... the operating system took the interrupt and then checked the queue of pending requests and would immediately "redrive" the controller &/or device with a new request. This would typically happen within tens of microseconds ... and find the controller still busy with house-keeping duties from the previous operation. The processor then was presented with, CC1, csw stored, control unit busy (i.e. status modifier plus busy; SM+BUSY in the channel status word). The operating system then had to mark the controller busy and wait until it freed itself up. Any time a controller presents SM+BUSY, it then has to present a later interrupt to indicate that it was now free.

While the VS1 workload almost never experienced the problem, the online service was doing double START I/O operations, seeing double I/O interrupts, and having a large percentage of operations being delayed by 1.5mills (for the 3880 compared to the 3830). This wasn't happening in the VS1 performance test case because it was effectively single-thread, not doing multiple concurrent operations, and effectively overlapping application/subsystem processing with the control unit housekeeping overhead.

Fortunately this incident occured nearly 6 months before scheduled first customer ship of the 3880 ... discovering the problem at this point allowed it to be addressed before the boxes being deployed in customer installations. In general, the switch from stand-alone engineering, development and test to working in an operating system environment allowed for a lot of problems to be flushed out before first customer shipment (that otherwise wouldn't have been encountered until after the boxes were at customers).

Another problem that the post-interrupt house-keeping resulted in was finding problems during the house-keeping (not directly related to the actual data transfer) that needed to be reported to the operating system. The standard process for reporting problem is adding the unit check flag to the status stored when the interrupt occurs. Since the final interrupt on the process has already occured ... there was no process for presenting the unit check error flag as part of the post-interrupt house-keeping.

The engineers decided to solve this problem was by presenting an unsoliccted unit check. This turns out to be a violation of the mainframe channel architecture (it is possible to do it ... but the specification that the mainframe operating system is written to ... effectively makes unsolicited unit check interrupt an invalid operation). I spent three months playing middle man between the san jose controller engineers and the POK channel engineers.

random refs:
http://www.garlic.com/~lynn/2000.html#9

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Is a VAX a mainframe?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Is a VAX a mainframe?
Newsgroups: alt.folklore.computers
Date: Sat, 08 Jul 2000 00:05:36 GMT
Terry Kennedy writes:
Performance was good once we got the version of the IMPL floppy for the 4331 that had microcode assist for VM (the machine was delivered with the wrong floppy).

misc. "ECPS" microcode aasist references (138/148 ... and then 4331/4341)
http://www.garlic.com/~lynn/94.html#21
http://www.garlic.com/~lynn/94.html#27
http://www.garlic.com/~lynn/94.html#28

the next in the series was 4361/4381. somewhat random piece of information was that the "service processor" for the 3090 was actually a pair of 4361s running a highly modified version of VM/SP-CMS release 6. The "service processor" panels (screens providing access to 3090 "hardware" functions) were done originally in IOS3270 running on CMS.

The ECPS functions and the use of VM/SP as the mainframe service processor could be considered part of the precursor the current PR/SM-LPAR mainframe functionality

random urls:
http://www.garlic.com/~lynn/2000.html#8
http://www.garlic.com/~lynn/2000.html#63
http://www.garlic.com/~lynn/2000.html#86
http://www.garlic.com/~lynn/2000b.html#50
http://www.garlic.com/~lynn/2000b.html#51
http://www.garlic.com/~lynn/2000b.html#52
http://www.garlic.com/~lynn/2000b.html#62

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

IBM's "ASCI White" and "Big Blue" architecture?

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: IBM's "ASCI White" and "Big Blue" architecture?
Newsgroups: alt.folklore.computers
Date: Sat, 08 Jul 2000 16:26:17 GMT
Douglas Weber writes:
I could not find details on ASCI White at IBM but here is the URL for an article on the predecesor ASCI Blue with links to detail


http://www.austin.ibm.com/resource/features/1998/asci_oct/

random other pieces of information:
http://www.garlic.com/~lynn/2000c.html#12
http://www.garlic.com/~lynn/2000c.html#21
http://www.garlic.com/~lynn/2000c.html#22

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Free RT monitors/keyboards

Refed: **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Free RT monitors/keyboards
Newsgroups: alt.folklore.computers
Date: Sat, 08 Jul 2000 16:33:42 GMT
Mark Wogahn writes:
We are cleaning out the storage closets here at Yale and found boxes of unopened IBM RT monitors and keyboards. Anyone out there want them? We are just

where were the sysetms?

i know that NSFNET1 backbone locations had racks & racks of RTs as the routers for the NSFNET1 precursor to the Internet.

Each NSFNET1 backbone site had multiple T1 links connecting it to other sites. Each T1 (1.5mbit/sec) was connected to IDNX(?) multiplexor which translated a T1 circuit into three 440kbit/sec circuits.

A RT would have a link adapter card that drive a 440kbit/sec circuit, LAN card and running NSFNET1 router software.

I remember being in the NSFNET1 backbone room at NCAR (boulder) and there was two walls of open shelf racks with a whole lot of RTs on the shelves.

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Unisys vs IBM mainframe comparisons

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Unisys vs IBM mainframe comparisons
Newsgroups: bit.listserv.ibm-main
Date: Thu, 06 Jul 2000 16:02:18 GMT
jbroido@PERSHING.COM (Jeffrey Broido) writes:
Martyn, With all due respect to Mr. Merrill, with whom I hesitate to quarrel since meeting him and the jargon I wish he hadn't coined in the mid '70s, IBM had virtual storage designs generally available shortly after Burroughs did, they didn't wait until the mid '70s, and both were behind RCA, which had released virtual Spectra 70 systems before Burroughs or IBM released theirs, at least according to RCA at the time. In any case, no matter what the commercial chronology, RCA claimed to have invented virtual storage in their labs in Camden in the '60s as a wholly original idea.

Jeff Broido


i believe that the virtual memory stuff goes to Atlas in England.

Cambridge Scientific Center added a Blea(sp?) box to a 360/40 in 65 which did address translation. Cambridge Scientific Center then wrote CP/40 and CMS for the box.

360/67 in 66 was a product (basically a 360/65 with 8-way associative address translation box that supported both 24-bit & 32-bit addressing (not 31-bit). Standard product was TSS/360 ... although CSC ported CP/40 to the '67 for CP/67. The 360/67 multiprocessor also had multi-ported memory (independent memory for each processor and the channel controller). On the 360/67 multiprocessor the "channel controller" which allowed all processors access to all channels in the configuration.

random refs:
http://www.garlic.com/~lynn/94.html#2
http://www.garlic.com/~lynn/98.html#10
http://www.garlic.com/~lynn/99.html#126
http://www.garlic.com/~lynn/2000.html#1
http://www.bryant.edu/~history/h364proj/fall_99/tobia/atlas.htm
http://www.sci.sdsu.edu/classes/bio595/timeline.html
http://web.archive.org/web/20021018225708/http://www.sci.sdsu.edu/classes/bio595/timeline.html
http://www.computer50.org/kgill/mark1/lav.html
http://web.archive.org/web/20001006224749/http://www.computer50.org/kgill/mark1/lav.html

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Unisys vs IBM mainframe comparisons

Refed: **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Unisys vs IBM mainframe comparisons
Newsgroups: bit.listserv.ibm-main
Date: Thu, 06 Jul 2000 18:07:57 GMT
jimkeo@lockstar.com (Jim Keohane) writes:
There was also Wang VS systems that had much of S/360 instruction set PLUS a REAL, LIVE STACK ARCHITECTURE!!!!!! Oh Frabjous Joy! Never actually worked on Wang. Was reading up on them just prior to contract being changed from Wang to Unix. - Jim Kohane

the interdata 4/32(?) is rumored to have had a s/360 instruction set. I never worked on one so don't know for sure. it has some distinction about being one of the first ports of unix (off of pdp).

did work with interdata 3s/4s earlier in buiding 360 PCM control unit (someplace it is attributed as originating the 360 PCM control unit business).

random URLs:
http://www.garlic.com/~lynn/2000c.html#36
http://www.garlic.com/~lynn/2000c.html#37

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Unisys vs IBM mainframe comparisons

Refed: **, - **, - **, - **, - **
From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Unisys vs IBM mainframe comparisons
Newsgroups: bit.listserv.ibm-main
Date: Thu, 06 Jul 2000 18:55:06 GMT
Anne & Lynn Wheeler writes:
the interdata 4/32(?) is rumored to have had a s/360 instruction

oops, typo ... that should have been interdata 7/32 & interdata 8/32

misc. refs:
http://www.geocities.com/SiliconValley/Sector/3784/
http://home.t-online.de/home/Johannes.Groener/typen.htm
http://www.de.freebsd.org/de/ftp/article/rt3.htm
http://web.archive.org/web/20041115125758/wolfram.schneider.org/bsd/ftp/article/rt3.htm

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Unisys vs IBM mainframe comparisons

From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Unisys vs IBM mainframe comparisons
Newsgroups: bit.listserv.ibm-main
Date: Fri, 07 Jul 2000 06:25:54 GMT
there have been threads on alt.folklore.computers recently on some of the virtual memory issues ... misc. ref from pieces:
http://www.garlic.com/~lynn/2000c.html#34
http://www.garlic.com/~lynn/2000c.html#35

--
Anne & Lynn Wheeler | lynn@garlic.com, finger for pgp key http://www.garlic.com/~lynn/

Is a VAX a mainframe?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Is a VAX a mainframe?
Newsgroups: alt.folklore.computers
Date: Mon, 10 Jul 2000 19:53:18 GMT
Lars Poulsen writes:
I think the 4331 was a DOS/VSE machine and the 4341 was the smallest thing that would run MVS.

at the time 4341 was available ... standard MVS had been upgraded to require some additional supervisor-only instructions which were available on the 3033.

nominal supervisor services were in the kernel ... in the same address space as the application code and function calls passed address parameters requiring accessing of data in the application virtual memory space. to move some of these supervisor services out of the kernel into their own virtual address space (like JES) ... required that the services have some method for reaching between the services address space and into the application address space. this function introduced on the 3033 was "cross-memory services". Later versions of MVS required this hardware support in order to operate.

Also introduced on the 3033 was the ability to have up to 64mbyte of real storage (even tho only 24bit virtual & 24bit real addressing modes were available). The 370s had 4kbyte pages (12 bits). The 370 "page table entries" were 16bits, a 12bit page number (supporting 12+12=24 bit address), two defined flags, and two unused bits. For the 3033 64mbyte real storage feature, the two unused bits were included in defining a page number ... this allowed 12bit+2bits worth of page numbers.

In any case, the 4341 didn't have cross-memory services support for running MVS.

A person that I worked with on HONE had just transferred from HONE to a branch office to become SE (systems engineer) on a large commercial account. The customer put in an order for four hundred 4341s running MVS. This required upgrading the microcode on 4341 to support cross-memory services. The SE spent his first several months on the job working with Endicott getting 4341 microcode support for cross-memory services.

random refs:
http://www.garlic.com/~lynn/2000c.html#30
http://www.garlic.com/~lynn/2000c.html#76

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

Is a VAX a mainframe?

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: Is a VAX a mainframe?
Newsgroups: alt.folklore.computers
Date: Tue, 11 Jul 2000 01:39:29 GMT
glass2 writes:
Was this also called Dual Address-space Support? For some reason, I'm thinking that I've seen these instructions referred to as part of the DAS feature.

Dave


posting today that I ran across today:
Newsgroups: bit.listserv.ibm-main
Date: 10 Jul 2000 11:16:09 -0700

As I recall, there is a UK site that has plenty of sample assembler code. I can not recall the site. Perhaps someone else might know. There is always the NASPA CD that has tons of assembler code.

The chalange is learning the HASN, PASN, SASN or whatever it's called so that you can write cross memory calls and routines and feel comfortable with that.


following from:
http://www.s390.ibm.com/bookmgr-cgi/bookmgr.cmd/BOOKS/IEA1A504/GLOSSARY

Cross memory mode. Cross memory mode exists when at least one of the following conditions are true:

The current primary address space (PASN) and the current home address space (HASN) are different address spaces.

The current secondary address space (SASN) and the current home address space (HASN) are different address spaces.

The ASC mode is secondary.


misc. urls:
http://www.s390.ibm.com:80/bookmgr-cgi/bookmgr.cmd/BOOKS/CMX00001/1%2e1?SHELF=CMX00001
http://www.s390.ibm.com:80/bookmgr-cgi/bookmgr.cmd/BOOKS/CMX00001/CCONTENTS?SHELF=CMX00001
http://www.telesend.com/univercd/cc/td/doc/product/software/ioss390/ios39aac/acconcpt.htm
http://www.hpl.hp.com/features/bill_worley_interview.html
http://web.archive.org/web/20000816002838/http://www.hpl.hp.com/features/bill_worley_interview.html
http://www.rs6000.ibm.com/doc_link/en_US/a_doc_lib/aixprggd/kernextc/ls_kern_svcs.htm
http://devsup.novell.de/ndk/doc/nwsaa/cpicref/cpic68.htm

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/

V-Man's Patton Quote (LONG) (Pronafity)

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From: Anne & Lynn Wheeler <lynn@garlic.com>
Subject: Re: V-Man's Patton Quote (LONG) (Pronafity)
Newsgroups: alt.folklore.military
Date: Tue, 11 Jul 2000 02:01:51 GMT
velovich@aol.com.CanDo (V-Man) writes:
9th & 10th SS Pz Divs had been resting for several weeks, (Two or three) and had already received replacements of men and equipment.

i spent some time with an individual who did some debriefing of both sides in the '50s. One of his observations was that the german tanks had a 5:1 kill ratio over the US and that US strategy was battle of attrition (although there was some donwside problems with troops being used as cannon fodder)

the following ref. claims a kill ratio of 10:1
http://www.valourandhorror.com/DB/SPEC/tank/German_tank_2.htm

Even with air superiority and tank killers like the Firefly, the German tanks were far superior to anything the Allies had and enjoyed a kill ratio of 1:10. In 1943-44 the US produced 47,000 tanks. Germany produced 29,600 tanks and assault guns. Britain produced only 5,000 tanks in 1944. Because of this the British depended on the American Sherman as their main battle tank.

misc. other refs:
http://www.armyradio.co.uk/publish/Articles/William_Howard_German/German_Tank_Radios.htm
http://www.acu.edu/academics/history/12ad/714atbx/1stpg714.htm
http://web.archive.org/web/20050205072354/http://www.acu.edu/academics/history/12ad/714atbx/1stpg714.htm
http://library.thinkquest.org/16650/table.htm
http://web.archive.org/web/20001202064700/http://library.thinkquest.org/16650/table.htm
http://members.home.net/zhukov/tankguns.html
http://valourandhorror.com/DB/SPEC/GM_tank_killers.htm
http://pslab11.polsci.wvu.edu/students/jconners/conners.html
http://web.archive.org/web/20010224042853/http://pslab11.polsci.wvu.edu/students/jconners/conners.html
http://www.garlic.com/~lynn/94.html#8
http://www.garlic.com/~lynn/99.html#120

--
Anne & Lynn Wheeler | lynn@garlic.com http://www.garlic.com/~lynn/ http://www.adcomsys.net/lynn/


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